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公开(公告)号：DE2354737A1
公开(公告)日：1974-05-09
申请号：DE2354737
申请日：1973-11-02
Applicant: IBM
Inventor： MATTSON GARY LEVERNE , SEGAR LAWRENCE PETER
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公开(公告)号：DE2535424A1
公开(公告)日：1976-04-29
申请号：DE2535424
申请日：1975-08-08
Applicant: IBM
Inventor： MATTSON GARY LEVERNE
Abstract: 1505515 Automatic phase control INTERNATIONAL BUSINESS MACHINES CORP 23 May 1975 [15 Oct 1974] 22873/75 Heading H3A A circuit for producing clock pulses 21 which are accurately spaced with respect to data times such as a, b... y at which raw data pulses Z 2 , such as A, B, ... F should exist on a raw data line assuming no time shifting due to transmission difficulties (as shown, pulses A, D and F occur at the proper times a,f and i, whilst pulses B, E are early and pulse C is late) comprises a voltage controlled oscillator; means producing a first signal X 7 for increasing the frequency of the oscillator, which signal is initiated at the leading edge of a raw data pulse and is terminated a predetermined time after a data time such as a, b, &c. (as shown, the predetermined time is one quarter of the normal time interval between successive pulses); and means producing a second signal X 6 for decreasing the frequency of the oscillator, the second signal being initiated when the signal X 7 terminates and being terminated midway between the data times such as a, b &c. Suitable circuitry for producing the clock pulses is described with reference to Figs. 1 and 2 (not shown), and includes a charge pump which controls the oscillator in response to the signals X 6 and X 7 which are derived from NAND gates. The specification shows how this arrangement provides clock pulses from input data signals which do not include regular clock pulses and which may be, for example, signals of modified frequency modulation which only includes clock signals, such as G in Fig. 3, between two consecutive zeroes of the data signal.
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公开(公告)号：DE2328501A1
公开(公告)日：1973-12-20
申请号：DE2328501
申请日：1973-06-05
Applicant: IBM
Inventor： GORETZKI JEROME ARNOLD , HENDRICKSON KENNETH EARL , MATTSON GARY LEVERNE , MATTSON LARRY FREDERICK
Abstract: Control apparatus for a stepper motor functional to provide a varying amount of retro-torque braking depending on the load and voltage applied to the motor. The control apparatus includes circuitry responsive to the velocity of the rotor of the motor and more particularly to the time required for the rotor to move through a certain rotation and means for varying the application of the braking effect according to variations of this time and also of voltage applied to the motor.
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