公开(公告)号：WO2010012633A3

公开(公告)日：2010-06-24

申请号：PCT/EP2009059395

申请日：2009-07-22

Applicant: IBM ,  IBM UK ,  BENDER CARL ALFRED ,  HOCHSCHILD PETER HEINER ,  MISRA ASHUTOSH ,  SWETZ RICHARD

Inventor： BENDER CARL ALFRED ,  HOCHSCHILD PETER HEINER ,  MISRA ASHUTOSH ,  SWETZ RICHARD

IPC: G06F11/34

CPC classification number: H03K21/00 ,  G06F11/348 ,  G06F2201/86 ,  G06F2201/88 ,  H03K23/42

Abstract: There is broadly contemplated herein an arrangement whereby each event source feeds a small dedicated "pre-counter" while an actual count is kept in a 64-bit wide RAM. Such an implementation preferably may involve a state machine that simply sweeps through the pre-counters, in a predetermined fixed order. Preferably, the state machine will access each pre-counter, add the value from the pre-counter to a corresponding RAM location, and then clear the pre-counter. Accordingly, the pre-counters merely have to be wide enough such that even at a maximal event rate, the pre-counter will not be able to wrap (i.e., reach capacity or overflow) before the "sweeper" state machine accesses the pre-counter.

Abstract translation: 这里广泛地考虑了一种安排，其中每个事件源提供一个小的专用“预计数器”，而实际的计数保存在64位宽的RAM中。 这样的实施方式优选地可以包括以预定的固定顺序简单地扫过预计数器的状态机。 优选地，状态机将访问每个预计数器，将来自预计数器的值添加到相应的RAM位置，然后清除预计数器。 因此，预计数器只需要足够宽，使得即使在最大事件速率下，在“清扫器”状态机访问预先计数器之前，预计数器将不能够包装（即达到容量或溢出） 计数器。

公开(公告)号：JP2002149591A

公开(公告)日：2002-05-24

申请号：JP2001254143

申请日：2001-08-24

Applicant: IBM

Inventor： SEETARAMU GUNDOU RAO ,  MISRA ASHUTOSH ,  SOUMYA BANERJEA

IPC: G06F13/16 ,  G06F1/00 ,  G06F13/28 ,  G06F13/362 ,  G06F13/38

Abstract: PROBLEM TO BE SOLVED: To provide architecture by which a bus usage amount is optimized concerning data reading transfer and data writing transfer and which is provided with an improved device for interfacing with an on-chip bus to be used in an SOC performing state. SOLUTION: A master engine performs the transfer transaction of N-byte data on the bus of a PLB system. The type of reading or writing data transfer to be performed by the master engine is decided to optimize a bus operation in response to a transfer request which is asynchronously received from the device connected to the bus. A request type deciding function is used for it. Data is asynchronously transferred between the device and the bus through the use of a FIFO in accordance with the decided transfer type.

公开(公告)号：JP2002049579A

公开(公告)日：2002-02-15

申请号：JP2001185459

申请日：2001-06-19

Applicant: IBM

Inventor： MISRA ASHUTOSH ,  SEETARAMU GUNDOU RAO ,  ANRU SHRIKANT KESUTE

IPC: G06F9/30 ,  G06F13/362 ,  G06F13/40

Abstract: PROBLEM TO BE SOLVED: To provide improved architecture for an on-chip bus which flexibly and robustly supports various built-in system requirements. SOLUTION: This is a dual-master device which manages a processor local bus(PLB) supporting up to 16 masters as a high-performance on-chip bus used by many system-on-chip(SOC) applications. This device includes a 1st circuit which generates an address phase for read data connected to the PLB and a 2nd circuit which generates an array phase for write data connected to the PLB. The 2nd address phase generating circuit is so constituted as to perform writing operation when a write data bus is idle and a read data bus is busy and vice versa.

公开(公告)号：CA2311432C

公开(公告)日：2007-10-16

申请号：CA2311432

申请日：2000-06-13

Applicant: IBM

Inventor： MISRA ASHUTOSH ,  DESAI NARENDRA M ,  MARION NEAL R ,  PUDOTA RAJU B S ,  RAO SEETHARAM G

IPC: G06F3/14 ,  G09G5/08

Abstract: Smoother transitions between changing cursor images which are less stressful to the interactive user of a computer controlled display are provided by apparatus for changing the cursor image, including a frame buffer for storing the display screen image as a pixel array, a separate display buffer for storing the current cursor image as a pixel array, togeth er with apparatus for storing an alternate cursor image as a pixel array during the display of the current cursor image, and means for replacing the current cursor image with the alternate cursor image . In raster scan apparatus for maintaining screen images in the frame buffer on said display screen, there are means for effecting the replacement of said cursor images during a vertical blanki ng period in said raster scanning.

公开(公告)号：CA2311432A1

公开(公告)日：2001-02-05

申请号：CA2311432

申请日：2000-06-13

Applicant: IBM

Inventor： RAO SEETHARAM G ,  PUDOTA RAJU B S ,  MISRA ASHUTOSH ,  DESAI NARENDRA M ,  MARION NEAL R

IPC: G06F3/14 ,  G09G5/08 ,  G06F3/033

Abstract: Smoother transitions between changing cursor images which are less stressful to the interactive user of a computer controlled display are provided by apparatus for changing the cursor image, including a frame buffer for storing the display screen image as a pixel array, a separate display buffer for storing the current cursor image as a pixel array, togeth er with apparatus for storing an alternate cursor image as a pixel array during the display of the current cursor image, and means for replacing the current cursor image with the alternate cursor image . In raster scan apparatus for maintaining screen images in the frame buffer on said display screen, there are means for effecting the replacement of said cursor images during a vertical blanki ng period in said raster scanning.