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公开(公告)号:CZ20013478A3
公开(公告)日:2002-03-13
申请号:CZ20013478
申请日:2000-03-24
Applicant: IBM
Abstract: A method of servicing a computer system without interrupting operation of the computer system, by connecting a computer component to a board of the computer system, detecting connection of the computer component to the system board using a control circuit, supplying power to the voltage input of the computer component in response to detecting the connection, and thereafter monitoring the power supplied to the voltage input of the computer component. The method may be used for core computer components such as CPU modules and voltage regulator modules. Power to the voltage input of the computer component is turned off in response to a determination that a current level of the power supplied to the voltage input exceeds a specified level. A fault signal is latched in an active state in response to the determination; the fault signal is reset when the component is removed from the system. The method also applies to a plurality of hot-pluggable components, wherein the power supplied to each component is individually monitored.
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公开(公告)号:DE3484744D1
公开(公告)日:1991-08-01
申请号:DE3484744
申请日:1984-03-09
Applicant: IBM
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公开(公告)号:ES2194714T3
公开(公告)日:2003-12-01
申请号:ES00912801
申请日:2000-03-24
Applicant: IBM
Abstract: A method of servicing a computer system without interrupting operation of the computer system, by connecting a computer component to a board of the computer system, detecting connection of the computer component to the system board using a control circuit, supplying power to the voltage input of the computer component in response to detecting the connection, and thereafter monitoring the power supplied to the voltage input of the computer component. The method may be used for core computer components such as CPU modules and voltage regulator modules. Power to the voltage input of the computer component is turned off in response to a determination that a current level of the power supplied to the voltage input exceeds a specified level. A fault signal is latched in an active state in response to the determination; the fault signal is reset when the component is removed from the system. The method also applies to a plurality of hot-pluggable components, wherein the power supplied to each component is individually monitored.
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公开(公告)号:CA2367894A1
公开(公告)日:2000-10-05
申请号:CA2367894
申请日:2000-03-24
Applicant: IBM
Abstract: A method of servicing a computer system without interrupting operation of th e computer system, by connecting a computer component to a board of the comput er system, detecting connection of the computer component to the system board using a control circuit, supplying power to the voltage input of the compute r component in response to detecting the connection, and thereafter monitoring the power supplied to the voltage input of the computer component. The metho d may be used for core computer components such as CPU modules and voltage regulator modules. Power to the voltage input of the computer component is turned off in response to a determination that a current level of the power supplied to the voltage input exceeds a specified level. A fault signal is latched in an active state in response to the determination; the fault signa l is reset when the component is removed from the system. The method also applies to a plurality of hot-pluggable components, wherein the power suppli ed to each component is individually monitored.
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公开(公告)号:CA2367894C
公开(公告)日:2005-01-11
申请号:CA2367894
申请日:2000-03-24
Applicant: IBM
Abstract: A method of servicing a computer system without interrupting operation of th e computer system, by connecting a computer component to a board of the comput er system, detecting connection of the computer component to the system board using a control circuit, supplying power to the voltage input of the compute r component in response to detecting the connection, and thereafter monitoring the power supplied to the voltage input of the computer component. The metho d may be used for core computer components such as CPU modules and voltage regulator modules. Power to the voltage input of the computer component is turned off in response to a determination that a current level of the power supplied to the voltage input exceeds a specified level. A fault signal is latched in an active state in response to the determination; the fault signa l is reset when the component is removed from the system. The method also applies to a plurality of hot-pluggable components, wherein the power suppli ed to each component is individually monitored.
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公开(公告)号:DE3273117D1
公开(公告)日:1986-10-16
申请号:DE3273117
申请日:1982-05-12
Applicant: IBM
Inventor: MUELLER MARK WAYNE , PARKER THOMAS SHELTON
Abstract: A communication adapter circuit (10) is connected to a processor through processor I/0 interface buses (12, 14). Data and control signals are provided through the buses (12, 14) to a timer circuit (18), a programmable peripheral interface circuit (20), an asynchronous and bisynchronous control circuit (22) and an SDLC/HDLC control circuit (24). Each of the control circuits (22, 24) includes parallel-to-serial and serial-to-parallel conversion circuitry. A clock select circuit (32) operates in conjunction with the timer circuit (18) and the programmable peripheral interface circuit (20) to establish a data transmission rate for the data flow through the adapter circuit (10). From the control circuits (22, 24) the data is transmitted through a modem interface bus (44) to a dual modem switch (56). From the switch (56) the data is transmitted to either an EIA RS 232 interface circuit (60) to a conventional modem or through a bus (64) to an internal modem. A phase locked loop circuit in the control circuit (24) generates a data clock signal on a line (33) for operation of the adapter circuit (0) in the bisynchronous protocol with a non-clock-generating modem.
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公开(公告)号:DE3267526D1
公开(公告)日:1986-01-02
申请号:DE3267526
申请日:1982-04-15
Applicant: IBM
Inventor: MUELLER MARK WAYNE , PARKER THOMAS SHELTON , BENIGNUS DOUGLAS MARVIN , FRYE JAMES LEE
Abstract: A communication adapter circuit (10) is connected to a processor through a data bus (12)and a control bus (14). Data and control signals are provided through the buses (12,14) to a timer circuit (18), a programmable peripheral interface circuit (20), an asynchronous and bisynchronous control circuit (22) and an SDLC/HDLC control circuit (24). Each of the control circuits (22, 24) includes parallel-to-serial and serial-to-parallel conversion circuitry. A clock select circuit (32) operates in conjunction with the timer circuit (18) and the programmable peripheral interface circuit (20) to establish a data transmission rate for the data flow through the adapter circuit (10). From the control circuits (22, 24) the data is transmitted through a bi-directional serial line (44) to a dual modem switch (56). From the switch (56) the data is transmitted to either an EIA interface circuit (60) to a conventional modem or through a line (64) to an internal modem.
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公开(公告)号:AT239943T
公开(公告)日:2003-05-15
申请号:AT00912801
申请日:2000-03-24
Applicant: IBM
Abstract: A method of servicing a computer system without interrupting operation of the computer system, by connecting a computer component to a board of the computer system, detecting connection of the computer component to the system board using a control circuit, supplying power to the voltage input of the computer component in response to detecting the connection, and thereafter monitoring the power supplied to the voltage input of the computer component. The method may be used for core computer components such as CPU modules and voltage regulator modules. Power to the voltage input of the computer component is turned off in response to a determination that a current level of the power supplied to the voltage input exceeds a specified level. A fault signal is latched in an active state in response to the determination; the fault signal is reset when the component is removed from the system. The method also applies to a plurality of hot-pluggable components, wherein the power supplied to each component is individually monitored.
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公开(公告)号:HU0200565A2
公开(公告)日:2002-06-29
申请号:HU0200565
申请日:2000-03-24
Applicant: IBM
Abstract: A method of servicing a computer system without interrupting operation of the computer system, by connecting a computer component to a board of the computer system, detecting connection of the computer component to the system board using a control circuit, supplying power to the voltage input of the computer component in response to detecting the connection, and thereafter monitoring the power supplied to the voltage input of the computer component. The method may be used for core computer components such as CPU modules and voltage regulator modules. Power to the voltage input of the computer component is turned off in response to a determination that a current level of the power supplied to the voltage input exceeds a specified level. A fault signal is latched in an active state in response to the determination; the fault signal is reset when the component is removed from the system. The method also applies to a plurality of hot-pluggable components, wherein the power supplied to each component is individually monitored.
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公开(公告)号:AU3444700A
公开(公告)日:2000-10-16
申请号:AU3444700
申请日:2000-03-24
Applicant: IBM
Inventor: THOMSEN PETER MATTHEW , WALTER LUCINDA MAE , MUELLER MARK WAYNE
Abstract: A method of servicing a computer system without interrupting operation of the computer system, by connecting a computer component to a board of the computer system, detecting connection of the computer component to the system board using a control circuit, supplying power to the voltage input of the computer component in response to detecting the connection, and thereafter monitoring the power supplied to the voltage input of the computer component. The method may be used for core computer components such as CPU modules and voltage regulator modules. Power to the voltage input of the computer component is turned off in response to a determination that a current level of the power supplied to the voltage input exceeds a specified level. A fault signal is latched in an active state in response to the determination; the fault signal is reset when the component is removed from the system. The method also applies to a plurality of hot-pluggable components, wherein the power supplied to each component is individually monitored.
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