公开(公告)号：DE69022104T2

公开(公告)日：1996-05-02

申请号：DE69022104

申请日：1990-03-27

Applicant: IBM

Inventor： BEHUN JOHN RICHARD ,  MILLER WILLIAM ROBERT ,  NEWMAN BERT HARRISON ,  YANKOWSKI EDWARD LOUIS

IPC: H01R12/04 ,  H01L23/50 ,  H05K3/34 ,  H01L21/48

Abstract: A low cost process for fabricating solder column interconnections for an electronic package is described. The process includes the steps of filling an array of pin holes in a pin mold (14) with a lead/tin solder, which array of pin holes is in substantial registration with the array of conductive pads (12) on one side of a chip carrier (2); heating the lead/tin solder in the pin mold such that the solder becomes molten and coalesces with the array of conductive pads of the chip carrier, thereby forming an array of miniature pins (4) bonded to the array of conductive pads of the chip carrier; joining circuit components to the other side of the chip carrier; and reflowing an eutectic lead/tin solder paste screened to the corresponding array of conductive pads of a circuit board to bond the free ends of the array of miniature pins of the carrier to the corresponding array of conductive pads, thereby forming the solder column connections between the chip carrier and the circuit board. The process is suitable for mass production of reliable, high-density electrical inter-connections between a chip carrier and a supporting circuit board.

公开(公告)号：DE69022104D1

公开(公告)日：1995-10-12

申请号：DE69022104

申请日：1990-03-27

Applicant: IBM

Inventor： BEHUN JOHN RICHARD ,  MILLER WILLIAM ROBERT ,  NEWMAN BERT HARRISON ,  YANKOWSKI EDWARD LOUIS

IPC: H01R12/04 ,  H01L23/50 ,  H05K3/34 ,  H01L21/48

Abstract: A low cost process for fabricating solder column interconnections for an electronic package is described. The process includes the steps of filling an array of pin holes in a pin mold (14) with a lead/tin solder, which array of pin holes is in substantial registration with the array of conductive pads (12) on one side of a chip carrier (2); heating the lead/tin solder in the pin mold such that the solder becomes molten and coalesces with the array of conductive pads of the chip carrier, thereby forming an array of miniature pins (4) bonded to the array of conductive pads of the chip carrier; joining circuit components to the other side of the chip carrier; and reflowing an eutectic lead/tin solder paste screened to the corresponding array of conductive pads of a circuit board to bond the free ends of the array of miniature pins of the carrier to the corresponding array of conductive pads, thereby forming the solder column connections between the chip carrier and the circuit board. The process is suitable for mass production of reliable, high-density electrical inter-connections between a chip carrier and a supporting circuit board.