公开(公告)号：US3042304A

公开(公告)日：1962-07-03

申请号：US82399659

申请日：1959-06-30

Applicant: IBM

Inventor： HALL EDDIE T ,  NEWTON JOHN D ,  WOOD JAMES R

IPC: G06F11/10

CPC classification number: G06F11/10

公开(公告)号：US3629853A

公开(公告)日：1971-12-21

申请号：US3629853D

申请日：1959-06-30

Applicant: IBM

Inventor： NEWTON JOHN D

IPC: G06F9/38 ,  G06F9/10

CPC classification number: G06F9/3814 ,  G06F9/3802 ,  G06F9/3875

Abstract: A digital computer system having multiple memory units for storing information words representative of data and instructions, control means including means for extracting information words from the memory units, and two instruction registers. A first instruction register stores an instruction while first steps in the manipulation thereof are performed and a second instruction register stores the instruction while second steps in the manipulation thereof are performed. The computer further includes means for transferring an instruction from the first instruction register to the second instruction register and means for transferring a further instruction to the first instruction register for effecting the concurrent processing of two instructions. Both data and instruction words may be extracted from different memory units at the same time. Control logic provides signals indicative of memory accessibility. The computer is also adapted to conditionally proceed with the processing of an instruction sequence in accordance with the probability of the occurrence of a condition prior to the ascertainment of that condition and to inhibit the instruction sequence and initiate the processing of another instruction sequence if the condition occurs.

公开(公告)号：US3181130A

公开(公告)日：1965-04-27

申请号：US12118061

申请日：1961-06-30

Applicant: IBM

Inventor： NEWTON JOHN D

IPC: H03K23/76

CPC classification number: H03K23/76