公开(公告)号：EP2157512A4

公开(公告)日：2012-10-10

申请号：EP08752541

申请日：2008-05-09

Applicant: IBM

Inventor： OGASAWARA TAKESHI

IPC: G06F9/50 ,  G06F9/48

CPC classification number: G06F9/5027 ,  G06F2209/5018

公开(公告)号：JP2011128787A

公开(公告)日：2011-06-30

申请号：JP2009285375

申请日：2009-12-16

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： ITO AI ,  OGASAWARA TAKESHI

IPC: G06F12/10

CPC classification number: G06F12/1009 ,  G06F12/1475 ,  G06F2212/652

Abstract: PROBLEM TO BE SOLVED: To provide a method and a system to accelerate address conversion from a virtual address to a physical address by mapping a virtual memory area by a large page according to a use situation of a virtual memory and individually processing a physical page corresponding to a virtual page needing individual coping inside the virtual memory area mapped to the large page.
SOLUTION: In this method to accelerate the address conversion to the physical address, a computer maps the virtual memory area including a plurality of virtual pages each having a page unit satisfying a prescribed condition by the large page that is an area larger than the virtual page, and sets physical memory protection information for protecting the physical page corresponding to a part of the virtual pages wherein a memory protection attribute differs on condition that the memory protection attribute of the part of the virtual pages included in the mapping large page differs from a memory protection attribute of the other virtual pages.
COPYRIGHT: (C)2011,JPO&INPIT

Abstract translation: 要解决的问题：提供一种通过根据虚拟存储器的使用情况将虚拟存储器区域映射到大页面的方法和系统来加速从虚拟地址到物理地址的地址转换，并且单独处理 物理页面对应于虚拟页面，需要在映射到大页面的虚拟存储器区域内的单独应对。 解决方案：在这种加速地址转换到物理地址的方法中，计算机映射虚拟存储器区域，该虚拟存储器区域包括多个虚拟页面，每个虚拟页面具有满足规定条件的页面单元， 虚拟页面，并且设置用于保护对应于虚拟页面的一部分的物理页面的物理内存保护信息，其中存储器保护属性在包括在映射大页面中的虚拟页面的部分的存储器保护属性不同的条件下不同 从其他虚拟页面的内存保护属性。 版权所有（C）2011，JPO＆INPIT

公开(公告)号：JP2010123059A

公开(公告)日：2010-06-03

申请号：JP2008298335

申请日：2008-11-21

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： OGASAWARA TAKESHI

IPC: G06F12/00 ,  G06F1/32

CPC classification number: G06F12/0276 ,  G06F2212/1028 ,  Y02D10/13

Abstract: PROBLEM TO BE SOLVED: To perform an electric power saving mode without causing degradation of performance, in a computer using a garbage collection (GC). SOLUTION: A memory power control method operates the garbage collection for collecting objects which have become unnecessary in a mass, by using a computer having a memory with the electric power saving mode, and assigns the objects to memory blocks obtained by dividing an address space of the memory with a predetermined fixed size. Further, the method performs the steps of: dividing a heap area 14 on the memory into a plurality of subheap areas for management; and dynamically changing the number of the subheap areas on the basis of size relationship between a necessary time of the garbage collection and a target value defined previously. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：在使用垃圾收集（GC）的计算机中进行省电模式而不会导致性能下降。 解决方案：存储器功率控制方法通过使用具有省电模式的存储器的计算机来操作用于收集大量不必要的对象的垃圾收集，并将对象分配给通过划分获得的存储块 具有预定固定尺寸的存储器的地址空间。 此外，该方法执行以下步骤：将存储器上的堆区14划分为多个子区域用于管理; 并且基于垃圾收集的必要时间与先前定义的目标值之间的大小关系来动态地改变子区域的数量。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2011013985A

公开(公告)日：2011-01-20

申请号：JP2009158204

申请日：2009-07-02

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： KAWAHITO MOTOHIRO ,  OGASAWARA TAKESHI

IPC: G06F9/44

CPC classification number: G06F8/443 ,  G06F8/315

Abstract: PROBLEM TO BE SOLVED: To manage an object by accessing management information by non-detection write processing which does not detect the generation of writing in an unchangeable object.SOLUTION: An apparatus for executing a target program includes: a storage part for storing a value of an object and management information of the object in association with each other; a code generation part for generating an optimized object optimized under a condition that the value of the object is unchangeable and an unoptimized code which is executed when the value of the object is changed from the target program; a switching part which when the target program is executed by the optimized code, switches the execution of the target program from execution on the basis of the optimized code to execution on the basis of the unoptimized code according to the generation of writing of a value to the object; and a management part for managing the object by accessing management information by the non-detection write processing which does not detect the generation of writing in the object.

Abstract translation: 要解决的问题：通过不检测不可更改对象中的写入生成的非检测写入处理来访问管理信息来管理对象。解决方案：一种用于执行目标程序的装置，包括：存储部件，用于存储值 对象的对象和管理信息相关联; 用于生成在所述对象的值不可改变的条件下优化的优化对象的代码生成部，以及当所述对象的值从所述目标程序改变时执行的未优化的代码; 切换部，当通过优化代码执行目标程序时，根据优化代码的执行将目标程序的执行从基于优化代码的执行切换到基于未优化代码的执行，根据生成写入值 物体; 以及管理部件，用于通过不检测对象中的写入生成的非检测写入处理访问管理信息来管理对象。

公开(公告)号：JP2010102654A

公开(公告)日：2010-05-06

申请号：JP2008275916

申请日：2008-10-27

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： OGASAWARA TAKESHI

IPC: G06F9/52

CPC classification number: G06F9/526

Abstract: PROBLEM TO BE SOLVED: To provide a management device, a management program and a management method that efficiently manages shared data. SOLUTION: The management device for managing data includes: a data storage part for storing the data; a plurality of entry storage parts for storing an entry for registering a pointer to the data, respectively; and a plurality of registration parts for retrieving the entry storage part, having a free entry from the plurality of entry storage parts when receiving a data registration instruction, registering the pointer to the data of a registration object in the entry storage part retrieved, and storing the identification information of the entry storage part retrieved in the data storage part, corresponding to the data of the registration object. COPYRIGHT: (C)2010,JPO&INPIT

Abstract translation: 要解决的问题：提供有效管理共享数据的管理装置，管理程序和管理方法。 解决方案：用于管理数据的管理装置包括：数据存储部分，用于存储数据; 多个条目存储部分，用于分别存储用于将指针注册到数据的条目; 以及多个用于检索条目存储部分的注册部分，当接收到数据注册指令时，具有从多个条目存储部分的空闲条目，将指针注册到检索到的条目存储部分中的注册对象的数据，并存储 检索在数据存储部分中的条目存储部分的识别信息对应于登记对象的数据。 版权所有（C）2010，JPO＆INPIT

公开(公告)号：JP2003196106A

公开(公告)日：2003-07-11

申请号：JP2001387263

申请日：2001-12-20

Applicant: IBM

Inventor： OGASAWARA TAKESHI

IPC: G06F9/44 ,  G06F9/45

Abstract: PROBLEM TO BE SOLVED: To enable a further efficient code elimination by DCE (dead code elimination) in the optimization of a program in a compile. SOLUTION: On the basis of the using state of an object reference in a method read in an execution program, the method read to be processed is determined, the method read determined as the object of processing is in-line developed, the instance variable of the object in the in-line developed method read is made scalar, and the dead code elimination is executed to the execution program in-line developed and made scalar. COPYRIGHT: (C)2003,JPO

公开(公告)号：JP2000020320A

公开(公告)日：2000-01-21

申请号：JP17094598

申请日：1998-06-18

Applicant: IBM

Inventor： OGASAWARA TAKESHI ,  KOMATSU HIDEAKI

IPC: G06F9/45 ,  G06F9/48 ,  G06F9/46

Abstract: PROBLEM TO BE SOLVED: To enable a just-in-time compiler to execute optimizing processing of exchanging instruction execution order while guaranteeing an exact exception. SOLUTION: When the instruction order of S1, S2, E1, S3 and S4 is exchanged as shown in the figure, for example, the part from forward moved instruction E1 to instruction S2 located before E1 is registered as an interruption inhibition section R1 and the part from forward moved instruction S4 to instruction S3 located before S4 is registered as an interruption inhibition section R2 (S is an instruction having operation observable from the outside at the time of the execution and E is an instruction having the possibility of the exception occurrence.). The instruction S4 following E1 in the original order is registered as an invalid instruction at the time the exception occurs in R1. When the exception occurs in E1, an interruption handler is started, the instruction in the interruption inhibition section R1 is copied to the other area and S4 is not copied. Further, the branch code to an exception processing routine is added to the end of the copy and the execution is restarted from S1.

公开(公告)号：JPH11338699A

公开(公告)日：1999-12-10

申请号：JP12702498

申请日：1998-05-11

Applicant: IBM

Inventor： YASUE TOSHIAKI ,  KOMATSU HIDEAKI ,  OGASAWARA TAKESHI

IPC: G06F9/45 ,  G06F9/42 ,  G06F9/44

Abstract: PROBLEM TO BE SOLVED: To increase the application range of execution optimization due to method inlining in a language having a security function. SOLUTION: A 1st method with self-recursion includes a step where a code needed for looping by tail recursion is produced, and a step where a code for counting the repetition number of a loop is produced. A security manager corrects depth in a storage area of a frame that is related to a 2nd method. Also, it includes a step where the code of the 1st method undergoes inlining in the 2nd method that includes the 1st method access in which processing is undetermined after being accessed, and a step where access relation of the 1st and 2nd methods in a state before making inlining the 1st method code is acquired and later is stored in an available storage area.

公开(公告)号：JPH1040223A

公开(公告)日：1998-02-13

申请号：JP15583196

申请日：1996-06-17

Applicant: IBM

Inventor： OGASAWARA TAKESHI ,  KOMATSU HIDEAKI

IPC: G06F15/16 ,  G06F9/45 ,  G06F15/163

Abstract: PROBLEM TO BE SOLVED: To fast recognize the set communication for the uniform problems in an execution mode by calculating a communication set in each dimension of an array based on the data structure and the processor expression and then extracting the set communication from the communication set of each dimension when the communication is performed. SOLUTION: An ITR list consists of an ITR block and an ITR master, i.e., a management data structure. The ITR block includes an array section that is designated by three sets of start, end and jump width and four sets which designate the opposite party of communication of the relevant area. Then the communication set of the ITR block is calculated in each dimension based on the management data structure of the ITR master and the processor expression that is not affected by the number of processors, and the set communication is extracted from the communication set of each dimension when the communication is performed. Thus, the set communication is fast recognized in an execution mode against the uniform problems.

公开(公告)号：JPH09330304A

公开(公告)日：1997-12-22

申请号：JP14244096

申请日：1996-06-05

Applicant: IBM

Inventor： KOMATSU HIDEAKI ,  OGASAWARA TAKESHI

IPC: G06F13/00 ,  G06F15/173 ,  G06F15/163

Abstract: PROBLEM TO BE SOLVED: To generate an optimum communication schedule when data are transmitted and received between processors which constitute parallel computers or a decentralized multiprocessor system. SOLUTION: The processors which communicate with one another are classified by groups (step 40), nodes are provided for the groups, one to one, and a communication graph having respective sides made to correspond to the communication is generated (steps 4 and 3). Graph are generated by the distances between the nodes. Then the communication graphs by the distances between the nodes are made to correspond to communication steps of the inter- processor communication (step 46). The communication to be made is totally grasped with the communication graphs and the sides of the communication graphs are made to correspond to the inter-processor communication which is made in a certain communication step, so the communication can be optimized.