公开(公告)号：WO2014137548A3

公开(公告)日：2015-02-26

申请号：PCT/US2014015716

申请日：2014-02-11

Applicant: IBM

Inventor： KIRIHATA TOSHIAKI ,  PAONE PHIL ,  PATEL VIMAL ,  UHLMANN GREGORY J

IPC: H01L23/62 ,  H01L21/82

CPC classification number: H01H85/05 ,  G11C17/16 ,  G11C17/18 ,  H01L23/5256 ,  H01L27/101 ,  H01L2924/0002 ,  H01L2924/00

Abstract: Embodiments may include an eFuse cell. The eFuse cell may include an eFuse having a first end and a second end. A blowFET has a first source/drain area, a second source/drain area, and a first gate. The first source/drain area is coupled to the second end of the eFuse, the second source/drain area is coupled to ground, and the first gate is coupled to a first node. The eFuse cell includes a senseFET having a third source/drain area, a fourth source/drain area, and a second gate. The second gate is coupled to the first node, and the third source/drain area is coupled to a second node. The second node is coupled to an operation signal and the second end of the eFuse. The eFuse cell includes a select eFuse logic element having an input to receive a select eFuse signal and an output coupled to the first node.

Abstract translation: 实施例可以包括eFuse单元。 eFuse单元可以包括具有第一端和第二端的eFuse。 blowFET具有第一源极/漏极区域，第二源极/漏极区域和第一栅极。 第一源极/漏极区域耦合到eFuse的第二端，第二源极/漏极区域耦合到地，并且第一栅极耦合到第一节点。 eFuse单元包括具有第三源极/漏极区域，第四源极/漏极区域和第二栅极的感测FET。 第二栅极耦合到第一节点，并且第三源极/漏极区域耦合到第二节点。 第二节点耦合到操作信号和eFuse的第二端。 eFuse单元包括具有用于接收选择eFuse信号的输入和耦合到第一节点的输出的选择eFuse逻辑元件。