公开(公告)号：DE3785405D1

公开(公告)日：1993-05-19

申请号：DE3785405

申请日：1987-07-17

Applicant: IBM

Inventor： FELDMAN PAUL NEIL ,  FRIEDMAN JOEL ,  PIPPENGER NICHOLAS JOHN

IPC: H04Q3/555 ,  H04Q3/60 ,  H04Q3/64 ,  H04Q3/495

Abstract: The present invention provides a single stage crossbar (10) and means (13) for controlling the crossbar that provides a capacity for "wide-sense non-blocking" connection of input signals to outputs that exceeds the number of outputs to which a given input is connected. Thus, the capacity of the crossbar is increased using a smaller number of crosspoints in a single stage than was available in the prior art. In one aspect, the present invention is an apparatus for connecting a signal on one of a plurality of inputs (11) to a non-busy one of a plurality of outputs (12), comprising a plurality of controllable switches arranged so that each input is connectable to at least an integer q outputs and so that no two inputs share more than an integer c outputs. The invention further comprises a means for controlling the controllable switches to connect the signal to a non-busy output so that no more than an integer f outputs that are connectable to any input become busy, where f is less than q.

公开(公告)号：DE3667873D1

公开(公告)日：1990-02-01

申请号：DE3667873

申请日：1986-09-03

Applicant: IBM

Inventor： PAUL WOLFGANG JAKOB ,  PIPPENGER NICHOLAS JOHN

IPC: H04Q3/545 ,  G06F13/374 ,  G06F15/173 ,  G06F15/16 ,  G06F13/36 ,  G06F13/14

Abstract: A method of conflict resolution in a parallel processor network comprising the combination of:providing, in the inter-processor communication arrangement of the network, a fixed priority resolution mechanism; arranging for each processor, when wishing to communicate with another processor, independently of any other processor, to generate a random number, comparing the random number with a threshold particular to the potentially requesting processor, and causing the processor to send its request to the inter-processor communication arrangement only if the generated random number is in a given inequality state relative to the threshold; and setting the threshold in and for each processor such that there exists a bias created in favour of the lowest priority processors as determined by the fixed priority order.

公开(公告)号：DE3785405T2

公开(公告)日：1993-11-11

申请号：DE3785405

申请日：1987-07-17

Applicant: IBM

Inventor： FELDMAN PAUL NEIL ,  FRIEDMAN JOEL ,  PIPPENGER NICHOLAS JOHN

IPC: H04Q3/555 ,  H04Q3/60 ,  H04Q3/64 ,  H04Q3/495

Abstract: The present invention provides a single stage crossbar (10) and means (13) for controlling the crossbar that provides a capacity for "wide-sense non-blocking" connection of input signals to outputs that exceeds the number of outputs to which a given input is connected. Thus, the capacity of the crossbar is increased using a smaller number of crosspoints in a single stage than was available in the prior art. In one aspect, the present invention is an apparatus for connecting a signal on one of a plurality of inputs (11) to a non-busy one of a plurality of outputs (12), comprising a plurality of controllable switches arranged so that each input is connectable to at least an integer q outputs and so that no two inputs share more than an integer c outputs. The invention further comprises a means for controlling the controllable switches to connect the signal to a non-busy output so that no more than an integer f outputs that are connectable to any input become busy, where f is less than q.