公开(公告)号：CA1266528A

公开(公告)日：1990-03-06

申请号：CA532244

申请日：1987-03-17

Applicant: IBM

Inventor： PETZ BRUCE R ,  RIEGER RICHARD P ,  WALLS ANDREW D

IPC: G06F11/10 ,  G06F12/16 ,  G06F11/00

Abstract: of the disclosure ERROR DETECTION USING VARIABLE FIELD PARITY CHECKING A variable number of parity bits or error correction code per word is used to increase error detection for words having the extra parity bits in a control store. Since some words do not utilize all the architected space available for words, extra parity bits are generated at development time for such words and stored with the words. A decoder identifies the location and number of parity bits. Parity checking against the extra parity bits is then performed on different groups of bits in the word. This provides an inexpensive means of increasing error detection with minimal hardware cost.