公开(公告)号：JP2003018188A

公开(公告)日：2003-01-17

申请号：JP2001195009

申请日：2001-06-27

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーション

Inventor： AYDEMIR METIN ,  RINDOS III ANDREW J ,  RODRIGUEZ JORGE ROLANDO

IPC: G06F13/36 ,  H04L12/863 ,  H04L12/931 ,  H04L12/56

Abstract: PROBLEM TO BE SOLVED: To solve the problem of there being the possibility that a serial queue, such as a PCI bus interface, is turned to be a bottleneck resulting in the latently annihilating benefits on performance for use of a high-speed network switching interface. SOLUTION: This system having an inter-remote bus high-speed switching interface is provided with a switching mechanism, to which a plurality of bus interfaces are connected. A programmable flow queue, having a plurality of parallel logical flow queues, is used for scheduling a packet in accordance with the protocol request of a remote bus interface.

Abstract translation: 要解决的问题：为了解决诸如PCI总线接口的串行队列变成瓶颈的可能性，导致对使用高速网络交换接口的性能的潜在湮没的好处 。 解决方案：具有远程总线高速交换接口的该系统具有连接有多个总线接口的切换机构。 具有多个并行逻辑流队列的可编程流队列用于根据远程总线接口的协议请求来调度分组。

公开(公告)号：DE3382655T2

公开(公告)日：1993-08-12

申请号：DE3382655

申请日：1983-09-13

Applicant: IBM

Inventor： PAEZ RICARDO ,  RODRIGUEZ JORGE ROLANDO

IPC: G01R31/28 ,  G06F11/277

Abstract: A method and circuit for using signature analysis testing techniques without deriving star/stop and clock signals from the device under test. In this invention, a start signal is derived from the output data stream by configuring that data stream to indicate when the test stream begins. The stop signal is derived by counting the predetermined number of data bit cells to be measured and issuing the stop signal when the count is reached. Data clock pulses are derived as a fraction of test system clock pulses at a frequency approximately equal to the bit cell frequency. The data clock pulse is located at the midpoint of the bit cell time so that the data stream is clocked into the signature analysis tester at a stable point.

公开(公告)号：GB2367712A

公开(公告)日：2002-04-10

申请号：GB0115530

申请日：2001-06-26

Applicant: IBM

Inventor： AYDEMIR METIN ,  RINDOS ANDREW JOHN ,  RODRIGUEZ JORGE ROLANDO

IPC: H04L12/58 ,  H04L12/56

Abstract: A system having a high speed switching interface between remote buses including a switch fabric to which multiple remote bus interfaces are connected. A programmable flow queue that includes multiple parallel logic flow queues is utilized for scheduling packets in accordance with protocol requirements of the remote bus interface.

公开(公告)号：GB2367712B

公开(公告)日：2003-12-17

申请号：GB0115530

申请日：2001-06-26

Applicant: IBM

Inventor： AYDEMIR METIN ,  RINDOS ANDREW JOHN ,  RODRIGUEZ JORGE ROLANDO

IPC: H04L12/58 ,  H04L12/56

Abstract: A system having a high speed switching interface between remote buses is disclosed herein. The system includes a switch fabric to which multiple remote bus interfaces are connected. A programmable flow queue that includes multiple parallel logic flow queues is utilized for scheduling packets in accordance with protocol requirements of the remote bus interface.

公开(公告)号：DE3382655D1

公开(公告)日：1993-03-18

申请号：DE3382655

申请日：1983-09-13

Applicant: IBM

Inventor： PAEZ RICARDO ,  RODRIGUEZ JORGE ROLANDO

IPC: G01R31/28 ,  G06F11/277

Abstract: A method and circuit for using signature analysis testing techniques without deriving star/stop and clock signals from the device under test. In this invention, a start signal is derived from the output data stream by configuring that data stream to indicate when the test stream begins. The stop signal is derived by counting the predetermined number of data bit cells to be measured and issuing the stop signal when the count is reached. Data clock pulses are derived as a fraction of test system clock pulses at a frequency approximately equal to the bit cell frequency. The data clock pulse is located at the midpoint of the bit cell time so that the data stream is clocked into the signature analysis tester at a stable point.