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    1.
    发明专利
    未知

    公开(公告)号：DE1269828B

    公开(公告)日：1968-06-06

    申请号：DE1269828

    申请日：1964-12-22

    Applicant: IBM

    Inventor： ROHLAND WILLIAM STANLEY

    IPC: G06K9/48

    Abstract: 1,021,129. Automatic character reading. INTERNATIONAL BUSINESS MACHINES CORPORATION. Dec. 9, 1964 [Dec. 23, 1963], No. 50015/64. Heading G4R. In an automatic character reader vertical scans are made through a character to obtain a series of black and white signals which are applied together with the scan signals of the previous three scans to a gating circuit adapted to produce signals representing the degree of penetration or entry of the scanning point into the black of the character or into the white beyond the black area, the signals produced being combined to obtain signals indicating shape elements of the character, these, in turn, being combined to identify the character. The present and three previous scans are shown at the point on a numeral " 3 " where they intersect the two curves. The present scan is on the left. At the top of the Figure all scans are white which condition is represented by the notation " 0 ". In the third row the present scan only has a black signal and this is the first degree of entry into the black, represented by " 1 ". In the next row the present and first previous scans are black giving the second degree of entry into black (" 3 "). The third degree of entry into black is represented by " 5 " and the fourth degree or " black " is " 7 ". In the eighth row the present scan leaves the black and this condition is termed the first degree of exit from black represented by notation " 2 ". Similarly successively greater degrees of exit are represented by " 4 " and " 6 " until full white, " 0 ", is reached. Signals representing these eight conditions are produced by the gating circuit as successive markings on eight leads, one marked at a time. The shape element circuit looks for specified sequences of these eight conditions, alternatives being provided by Or gating so that mis-shapen characters or characters from different fonts are passed. There are 47 shape elements each being represented by a marking on a corresponding lead. The recognition circuit looks for specified sequences of up to six of these shape element signals. The character signals are applied through an Or gate to reset the circuits upon recognition.

    2.
    发明专利
    未知

    公开(公告)号：DE1234066B

    公开(公告)日：1967-02-09

    申请号：DEJ0018364

    申请日：1960-06-28

    Applicant: IBM DEUTSCHALD INTERNATIONALE

    Inventor： JUN LOUIS EDMOND BUNDY ,  ROHLAND WILLIAM STANLEY

    IPC: G04F10/10 ,  G06K9/00 ,  G06K9/20 ,  G06K9/80

    Abstract: 948,821. Automatic character recognition. INTERNATIONAL BUSINESS MACHINES CORPORATION. June 16, 1960 [June 29, 1959], No. 21141/60. Heading G4R. Intervals of time between a datum pulse and a variable pulse are registered in an apparatus having a plurality of time-analogue voltage generators each associated with one cycle of a number of cycles, switching means switching the input pulses in each cycle into the corresponding generator, means for storing the time analogue voltage for a cycle and means for regenerating an interval pulse. The apparatus is described as applied to a character recognition system Fig. 2 in which a character on a moving card 41 is projected by lens 47 on to a revolving slotted disc 53 dissecting the image in vertical scans. A photo-cell 57 produces corresponding signals which after amplification, clipping and inversion are used to reset a trigger 72 previously set at the beginning of the scan by a timing pulse T1 read from a magnetic drum 65 revolving with the disc 53. The trigger 72 therefore produces pulses Vg whose duration represents the distance from the beginning of the scan to the intersection with the tops of the character. A delay 71 produces other timing pulses T2. The purpose of the apparatus is to determine the slope of the upper contour of the character e.g. a "6" as shown in Fig. 5. The distance X1 from the beginning of scan a which is a time value is converted into a voltage and stored until the next scan when it is compared with the time X2 taken in the following scan. The interval pulses Vg, one for each scan are applied to three gates 81, 83, 85, Fig. 3a which are enabled in succession by outputs from a chain of three triggers 73, 75, 77, and distributed to three charge and storage circuits 87, 89, 91. The pulse Vg when present in circuit 87 (say) causes normally conducting valve 93 to turn off and allows condenser 102 to charge from a +250 v source. The duration of the pulse Vg is therefore linearly converted into a voltage on condenser 102. A cathode follower 105 produces a corresponding output signal. Timing signals from the trigger chain are used to gate out these signals in succession through OR gate 113 on to line 115 and the condenser 102 is then discharged by a corresponding discharge circuit 117, 119, 121. The amplitude signal in line 115 is converted back to a timed pulse signal in a circuit comprising a condenser 157 which, when valve 153 is cut off by a T1 pulse at the beginning of a scan, charges at a linear rate to produce a saw-tooth voltage. The valve 143 acts as a threshold circuit conducting when the sawtooth voltage from condenser 157 on the grid exceeds the voltage on the cathode from line 115. The output from the anode is differentiated at 163, 165, squared and amplified in inverters 171, 173, and applied as a timed pulse on line 177 to triggers 179 and 181 Fig. 3b. The former turns on and the latter turns off on receipt of this signal. The interval pulse Vg from the next scan is also applied to the triggers turning 179 off and 181 on. If the pulse on line 177 arrives after the end of pulse Vg, trigger 179 remains on whereas if it arrives before the end of pulse Vg, trigger 181 remains on. The triggers are interconnected through gates 183, 185 and inverters 187, 189 to ensure that only one is on at any time. If trigger 179 is on a negative slope is indicated and a positive slope is indicated by trigger 181 being turned on. The output from the operative trigger is a duration pulse the length of which indicates the difference in time between intersections with the upper edge of the character on adjacent scans, that is, it indicates the slope. The polarity of the slope is stored on triggers 191, 193 and the magnitude is converted to an amplitude signal on condenser 205 by charging it for the duration of the pulse. The amplitude signal is applied to a pair of threshold devices 211, 213 responding to a gentle slope and a steep slope respectively. The outputs are stored on triggers 233,235. The signals from triggers 191, 193, 233 and 235 are combined in five ways in AND gates 237, 239, 241,243 and 245. These give indications that the slope is gentle and positive, gentle and negative, steep and positive, steep and negative or zero respectively. Successive gate signals indicate the slope of the upper edge of the character for each adjacent pair of scans. Signals representing the slope at predetermined scans may be used with other feature signals in character recognition circuitry.

    5.
    发明专利
    未知

    公开(公告)号：DE3782328T2

    公开(公告)日：1993-04-22

    申请号：DE3782328

    申请日：1987-12-18

    Applicant: IBM

    Inventor： ABRAHAM DENNIS GEORGE ,  DOUBLE GLEN PAUL ,  NECKYFAROW STEVEN WILLIAM ,  ROHLAND WILLIAM STANLEY ,  TUNG MIN-HSIUNG GEORGE

    IPC: G06K19/07 ,  B42D15/10 ,  G06F9/445 ,  G06K17/00 ,  G07F7/10

    Abstract: A smart card (10) which has a instruction processor (12) which is connected to a changeable memory (16) in which application programs are stored. The card is manufactured partially blank, or without an application program stored thereon, and an application program is then loaded into the changeable memory, i.e., by downloading it from a mainframe computer. In this manner, the application program in a smart card may be changes by an authorized party. Further, a flag (22) indicates whether a program has been loaded on a smart card. Also disclosed is a method of securing the program from tampering by unauthorized parties where, in response to certain instructions (such as a dump of the application program), key portions are erased prior to execution. Application programs are loaded onto the card through the use of a double timed reset, the first of which writes a predetermined sequence on the card for a set time interval. The second reset before the end of the set time interval then indicates that a program load function is to occur and causes key selected portions of the memory to be overwritten and erased to protect key data from the previous program from being maintained or used later.

    6.
    发明专利
    未知

    公开(公告)号：DE3782328D1

    公开(公告)日：1992-11-26

    申请号：DE3782328

    申请日：1987-12-18

    Applicant: IBM

    Inventor： ABRAHAM DENNIS GEORGE ,  DOUBLE GLEN PAUL ,  NECKYFAROW STEVEN WILLIAM ,  ROHLAND WILLIAM STANLEY ,  TUNG MIN-HSIUNG GEORGE

    IPC: G06K19/07 ,  B42D15/10 ,  G06F9/445 ,  G06K17/00 ,  G07F7/10

    Abstract: A smart card (10) which has a instruction processor (12) which is connected to a changeable memory (16) in which application programs are stored. The card is manufactured partially blank, or without an application program stored thereon, and an application program is then loaded into the changeable memory, i.e., by downloading it from a mainframe computer. In this manner, the application program in a smart card may be changes by an authorized party. Further, a flag (22) indicates whether a program has been loaded on a smart card. Also disclosed is a method of securing the program from tampering by unauthorized parties where, in response to certain instructions (such as a dump of the application program), key portions are erased prior to execution. Application programs are loaded onto the card through the use of a double timed reset, the first of which writes a predetermined sequence on the card for a set time interval. The second reset before the end of the set time interval then indicates that a program load function is to occur and causes key selected portions of the memory to be overwritten and erased to protect key data from the previous program from being maintained or used later.

    7.
    发明专利
    未知

    公开(公告)号：DE2353299A1

    公开(公告)日：1974-06-27

    申请号：DE2353299

    申请日：1973-10-24

    Applicant: IBM

    Inventor： MCNEIL WILLIAM DOUGLAS ,  ROHLAND WILLIAM STANLEY

    IPC: G06K9/20 ,  H04N1/401 ,  H04N1/38 ,  H04N5/21

    Abstract: 1430614 Scanning system INTERNATIONAL BUSINESS MACHINES CORP 21 Nov 1973 [18 Dec 1972] 53978/73 Heading H4F [Also in Division G1] To compensate for variations in the sensitivities of the individual photo-diodes in a photodiode array, e.g. a self-scanned linear array 25 of photo-diodes analysing light reflected from a moving document 14, the array is initially arranged to scan a standard background or white level which may be in the form of a document or a bedplate, and the resulting sensitivity video signal which represents non-uniformity in sensitivity and in illumination is stored and used to correct subsequent video information signals. The integrated 30 sensitivity video signal has a fixed grey level signal from source 32 subtracted, 35, therefrom, is digitized in A-D converter 40 and stored in memory 50, e.g. a shift register. During scanning of an information document these stored signals are read-out from the memory 50, D-A converted, 55, and added, 60, to the fixed grey level signal from source 32, the difference between resulting sensitivity video signal and the serial video information signal being derived in differential amplifier 65 and then divided by the sensitivity video signal in circuit 70 to produce at output 75 a compensated serial video information signal which may be fed via a threshold circuit to a utilization system such as a recognition, reproduction or processing system. To compensate for photo-diode leakage current non-uniformity, correction signals derived by initially scanning a black level may also be stored and subsequently read-out. Memory 50 and converters 40 and 55 may be replaced by an analogue shift register.

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