公开(公告)号：CA1228171A

公开(公告)日：1987-10-13

申请号：CA481986

申请日：1985-05-21

Applicant: IBM

Inventor： ROSENFELD PHILIP L ,  SO KIMMING

IPC: G06F12/08

Abstract: WORKING SET PREFETCH FOR LEVEL TWO CACHES In a computing system including a three level memory hierarchy comprised of a first level cache (L1), a second level cache (L2) and a main memory (L3), a working set history table is included which keeps a record of which lines in an L2 block where utilized when resident in the L2 cache through the use of tags. When this L2 block is returned to main memory and is subsequently requested, only the lines which were utilized in the last residency are transferred to the L2 cache. That is, there is a tag for future use of a line based on its prior use during its last residency in the L2 cache.

公开(公告)号：CA1244554A

公开(公告)日：1988-11-08

申请号：CA502802

申请日：1986-02-26

Applicant: IBM

Inventor： POMERENE JAMES H ,  PUZAK THOMAS R ,  RECHTSCHAFFEN RUDOLPH N ,  ROSENFELD PHILIP L ,  SPARACIO FRANK J

IPC: G06F9/38

Abstract: PAGEABLE BRANCH HISTORY TABLE A branch history table (BHT) is substantially improved by dividing it into two parts: an active area, and a backup area. The active area contains entries for a small number of branches which the processor can encounter in the near future and the backup area contains all other branch entries. Means are provided to bring entries from the backup area into the active area ahead of when the processor will use those entries. When entries are no longer needed they are removed from the active area and put into the backup area if not already there. New entries for the near future are brought in, so that the active area, though small, will almost always contain the branch information needed by the processor. The small size of the active area allows it to be fast and to be optimally located in the processor layout. The backup area can be located outside the critical part of the layout and can therefore be made larger than would be practicable for a standard BHT.