Abstract:
A structure for increasing the reliability of a magnetic bubble domain memory system in which the operating margins of various components within the system are enlarged so that the margins of the components will have a larger area of overlap. For components in which a lessening of the effect of the bias field Hz is desirable (splitters, generators, corner propagation elements, etc.), a thin layer of magnetically soft material (for instance, permalloy) is provided which extends over the area of the magnetic sheet in which the component function takes place. This thin layer is in addition to the overlay elements used to provide the function. In a memory system, selectively placed ''''thin patches'''' of permalloy or strips of permalloy are used in the critical component areas to improve operating margins of these components.
Abstract:
A decoder for cylindrical magnetic domain shift registers having means to clear the information from selected registers thus enabling new information to be written into those registers. The decoder is incorporated into 2N closed loop shift registers and uses only a small part of the storage area of the magnetic sheet in which domains exist. It is activated by 2N control lines (N pairs). Depending upon the activation of the decoder, the information in a selected shift register is passed to a clear means which sends it into one of two paths depending upon the activation of the clear means. One path brings the information to a detector for destructive readout, while the other path brings the information to a domain splitter. The domain splitter splits the input domains into two parts, one of which propagates to the detector while the other returns to the proper shift register. Thus, non-destructive readout (NDRO) or destructive read-out (DRO) is provided depending upon the activation of the clear means.
Abstract:
1,232,486. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 27 Sept., 1968 [17 Oct., 1967], No. 45902/68. Heading H1K. An integrated switching circuit comprises a switching device such as a thyristor 25 in a first area of an n(p)-type epitaxial layer 24 on a p(n)-type substrate 10 and an associated diode 27 and resistor 32 in a second area of the epitaxial layer 24, the areas being separated by p + (n + ) isolation zones 26. More than one such pair of areas may be provided. In the Si circuit disclosed buried n+ layers 22, 22 1 are formed by redistribution of prediffused As during the growth of the As-doped n-type epitaxial layer 24. B is diffused through the layer 24 to form the p + isolation zones 26. The thyristor 25 comprises B-diffused p-type anode and base regions P1, P2 and a P-diffused n-type cathode region N2. The p-type diode and resistor regions P3, P4 in the second area are formed simultaneously with the regions P1, P2. A1 electrodes join the various components as shown. A connection 58 may be provided to by-pass the parasitic capacitances across the junctions 48, 50 between the substrate 10 and the respective areas. A further electrode may be situated on the region 30 to enable the anode junction 42 to be reverse biased if desired. This has the effect of reducing the capacitance in the main current path of the thyristor.