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公开(公告)号:JPH11274408A
公开(公告)日:1999-10-08
申请号:JP3293499
申请日:1999-02-10
Inventor: MUKUTA S FALUKE , DAVID E KOTEKKI , ROBERT A LITA , ROSSNAGEL STEVEN M
IPC: H01L27/04 , H01L21/02 , H01L21/285 , H01L21/822 , H01L23/498 , H05K1/03 , H05K1/16
CPC classification number: H01L23/49894 , H01L21/28568 , H01L23/49827 , H01L23/49866 , H01L28/75 , H01L2224/16 , H01L2924/01019 , H01L2924/01046 , H01L2924/01057 , H01L2924/01077 , H01L2924/01078 , H01L2924/01079 , H01L2924/04941 , H01L2924/15311 , H01L2924/19103 , H05K1/0306 , H05K1/162
Abstract: PROBLEM TO BE SOLVED: To enhance electronic maintenance and operation characteristic by a method wherein a dielectric member connected to a multilayer ceramic substrate is provided between a lower electrode and an upper electrode containing a noble metal layer, and a barrier layer of TaSiN is provided between a noble metal and a metallic barrier thereunder on a lower surface of the lower electrode.
SOLUTION: An interposer capacitor 13 contains a multilayer ceramic substrate 16, and a thin film capacitor is formed thereon. A thin film structure 34 comprising the capacitor is carried on the multilayer ceramic substrate 16, and has a lower electrode 21 containing a plutinum layer having a TaSiN layer 35 on the lower side. A high K dielectric material 22 separates a platinum electrode 21 from an upper electrode 23 of the capacitor. The upper electrode 23 is covered with a polymer layer 24, and three vias 18, 29, 20 travel from a bottom face of the multilayer ceramic substrate 16 to an upper face thereof in the multilayer ceramic substrate 16, so that substrates are connected to each other and besides an interposer capacitor is connected to the thin film structure.
COPYRIGHT: (C)1999,JPOAbstract translation: 要解决的问题:为了通过以下方法提高电子维护和操作特性,其中在下电极和含有贵金属层的上电极之间设置与多层陶瓷基板连接的电介质构件,并且TaSiN的阻挡层设置在 在下电极的下表面上的贵金属和金属屏障。 解决方案:插入电容器13包含多层陶瓷基板16,并且在其上形成薄膜电容器。 包含电容器的薄膜结构34承载在多层陶瓷基板16上,并且具有下侧电极21,该下部电极21在下侧包含具有TaSiN层35的凹凸层。 高K电介质材料22将铂电极21与电容器的上电极23分开。 上部电极23被聚合物层24覆盖,并且三个通路18,29,20从多层陶瓷基板16的底面向多层陶瓷基板16的上表面行进,使得基板与各层 另外,除了中介层电容器连接到薄膜结构之外。
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公开(公告)号:CA1283381C
公开(公告)日:1991-04-23
申请号:CA509327
申请日:1986-05-16
Applicant: IBM
Inventor: BUMBLE BRUCE , CUOMO JEROME J , LOGAN JOSEPH S , ROSSNAGEL STEVEN M
IPC: H05K3/08 , C23C14/34 , C23F1/04 , C23F4/00 , H01J37/32 , H01L21/302 , H01L21/3065 , B44C1/22 , C03C15/00 , C03C25/06 , C23F1/02
Abstract: HOLLOW CATHODE ENHANCED PLASMA FOR HIGH RATE REACTIVE ION ETCHING AND DEPOSITION A metallic hollow cathode electrode structure for use in a RF-RIE sputter/etch system. The electrode defines a critical aspect ratio hollow cathode volume. In accordance with one embodiment of the invention, the electrode structure may consist of two closely spaced metal elements separated by a distance of a few centimeters. The elements are electrically and structurally connected by supports around their outer rim. An RF voltage is applied between the improved hollow cathode electrode structure and an evacuated chamber containing same through a suitable matching network. A plasma gas is supplied to the system from a point outside the electrodes and a suitable pumping system is used to maintain operating pressures in the 0.1 to 400 millitorr range. Samples to be sputtered are then placed on either of the inside electrode surfaces for sputter/etching. The aspect ratio (longest dimension of one of the elements/spacing between the elements) should be at least 4. According to a further embodiment, the hollow cathode electrode structure is characterized by a single plate having a plurality of cylindrical chambers or holes therein, each hole producing a hollow cathode glow when the system is energized. The aspect ratio (largest dimension of the chamber cross-section/depth of the chamber) for this embodiment should be at least 1.5.
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