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    CIRCUIT FOR LOGICAL EMULATION, LOGICAL BOARD WITH THE CIRCUIT, LOGICAL EMULATOR, AND COMMUNICATION METHOD IN LOGICAL EMULATION
    1.
    发明专利
    CIRCUIT FOR LOGICAL EMULATION, LOGICAL BOARD WITH THE CIRCUIT, LOGICAL EMULATOR, AND COMMUNICATION METHOD IN LOGICAL EMULATION 审中-公开

    公开(公告)号：JP2002358340A

    公开(公告)日：2002-12-13

    申请号：JP2002057139

    申请日：2002-03-04

    Applicant: IBM

    Inventor： GOODING THOMAS MICHAEL ,  MUSSELMAN ROY GLENN ,  NEWSHUTZ ROBERT N ,  RUEDINGER JEFFREY JOSEPH

    IPC: G01R31/28 ,  G06F9/455 ,  G06F17/50 ,  H03K19/00

    Abstract: PROBLEM TO BE SOLVED: To provide an apparatus and a method to control communication of time multiplexed data signal among asynchronous clock regions during hardware based emulation. SOLUTION: In a hardware-based logical emulation environment, communication of time multiplexed data signals among clock regions is controlled during emulation, by using a buffer 30 inserted into a common signal path among the asynchronous clock regions. Each data signal communicated across the path is latched through efficient use of the buffer 30 so that the regions receiving such signals extract the signals respectively at suitable points of evaluation cycles of the areas in a receiving circuit. Storage locations in the buffer 30 are associated with specified steps of evaluation cycles of the areas in a transmitting circuit and the receiving circuit, so that data writing and data reading are executed to the storage locations based on steps of present evaluations performed in each cycle in the transmitting and receiving circuits.

    Envelope packet architecture for broadband engine
    2.
    发明专利
    Envelope packet architecture for broadband engine 有权
    宽带发动机的包装架构

    公开(公告)号：JP2006087124A

    公开(公告)日：2006-03-30

    申请号：JP2005271199

    申请日：2005-09-16

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： CARNEVALE MICHAEL JOSEPH ,  CLARK SCOTT D ,  HILL DAVID WAYNE ,  JOHNS CHARLES RAY ,  POKRANDT THOMAS K ,  RUEDINGER JEFFREY JOSEPH ,  THELEN DOROTHY MARIE

    IPC: H04L29/08 ,  H04L1/16

    CPC classification number: H04L1/188

    Abstract: PROBLEM TO BE SOLVED: To reduce the number of envelope retransmissions in a system for sending an envelope and sending back an envelope.
    SOLUTION: The present invention provides for sending an envelope and sending back an envelope. A transmitter is configured to send an envelope. A receiver is coupled to the transmitter, wherein the receiver is configured to receive the envelope and generate a reply envelope. A send buffer is coupled to the transmitter, and a receiving buffer is coupled to the receiver. A retry timer is coupled to the transmitter, wherein the retry timer is configured to be reseted, upon the receipt of the reply envelope correlated to the transmit envelope. The transmitter is configured to retransmit an envelope, if the transmitter does not receive a corresponding reply envelope within a selected time period as determined by the retry timer. This leads to a decrease in the total number of envelopes, that are transmitted from both the transmitter and the receiver.
    COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：减少用于发送信封并发送信封的系统中的信封重传次数。 解决方案：本发明提供发送信封并发回信封。 发射机被配置为发送信封。 接收机耦合到发射机，其中接收机被配置为接收信封并产生回复信封。 发送缓冲器耦合到发送器，并且接收缓冲器耦合到接收器。 重试定时器耦合到发射机，其中重试定时器被配置为在接收到与发射包络相关的应答包络时被重置。 如果发射机在由重试定时器确定的所选择的时间段内没有接收到相应的应答包，则发射机被配置为重发信封。 这导致从发射机和接收机两者发送的信封总数的减少。 版权所有（C）2006，JPO＆NCIPI

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