公开(公告)号：DE19522807A1

公开(公告)日：1996-02-15

申请号：DE19522807

申请日：1995-06-23

Applicant: IBM

Inventor： CASPER DANIEL FRANCIS ,  GLASSEN STEVEN GARDNER ,  HALMA MARTEN JAN ,  RYAN SANDRA KAY

IPC: G06F13/12 ,  G06F15/163

Abstract: These occur between a processing unit with a host processor and a host memory and one or more input and output units, each designated by a number that is part of the I/O instruction carried through one or more channels with the processing unit. The host memory has a control region containing the control data for the I/O units and these control data have a recognition mark for the operation to be carried out between the I/O unit and the processing unit and a mark (CHPID) for one or more channels.