公开(公告)号：AT440320T

公开(公告)日：2009-09-15

申请号：AT01128119

申请日：2001-11-27

Applicant: IBM

Inventor： TAKANO KOHJI ,  SATOH AKASHI

IPC: G06F7/527 ,  G06F7/72 ,  G06F7/44 ,  G06F9/30 ,  G06F9/302 ,  G06F9/38 ,  G06F12/06

Abstract: The present invention attempts to resolve a Montgomery multiplier bottleneck problem encountered during memory access, by using general-purpose memories having two ports or single port. Two memories 7 and 8 are provided, so that variables that are stored in memory and must be read for an operation can be recorded in different memories. Thereafter, during a reading stage corresponding to a pipeline process, certain of the variables are read from the memory 7 and are loaded in the register 5, while the other variables are read from the memory 8 and are loaded in the other registers.

公开(公告)号：DE60139597D1

公开(公告)日：2009-10-01

申请号：DE60139597

申请日：2001-11-27

Applicant: IBM

Inventor： TAKANO KOHJI ,  SATOH AKASHI

IPC: G06F7/527 ,  G06F9/302 ,  G06F7/44 ,  G06F7/72 ,  G06F9/30 ,  G06F9/38 ,  G06F12/06

Abstract: The present invention attempts to resolve a Montgomery multiplier bottleneck problem encountered during memory access, by using general-purpose memories having two ports or single port. Two memories 7 and 8 are provided, so that variables that are stored in memory and must be read for an operation can be recorded in different memories. Thereafter, during a reading stage corresponding to a pipeline process, certain of the variables are read from the memory 7 and are loaded in the register 5, while the other variables are read from the memory 8 and are loaded in the other registers.