-
公开(公告)号：DE2557090A1
公开(公告)日：1976-08-19
申请号：DE2557090
申请日：1975-12-18
Applicant: IBM
Inventor： DENT III ROY FOGEL , SCHNEIDER RICHARD CRANE
Abstract: Data signals are linearly recorded on a record medium as a sequence of discrete amplitude levels, each level occurring in a bit period. For each received data bit signal, a separate sequence of such levels is generated in accordance with a predetermined rule such that each separate sequence of levels extends over a predetermined number of data bit periods. All of the amplitude levels from a plurality of data bit signals occurring in each data bit period are summed together to provide a resultant amplitude to be recorded. Such resultant amplitude in each data bit period is linearly recorded on the record medium. Readback and detection of such recorded signals is accomplished by first recovering data bit signals by supplying the readback signals through a filter matched to the sequence (preferably a tapped delay line) for reconstituting the data bit signals. The reconstituted data bit signals are then detected using known data bit detection techniques. The techniques are also applicable to other types of digital channels.
-
公开(公告)号：DE2509952A1
公开(公告)日：1975-09-18
申请号：DE2509952
申请日：1975-03-07
Applicant: IBM
Inventor： SCHNEIDER RICHARD CRANE , VIELE JUN LAWRENCE
IPC: G11B5/09
Abstract: Discrete magnetization areas on a magnetizable medium are switched by a magnetic field formed by current pulses through a magnetic head winding having relatively slow leading edge risetimes. The current risetime may be derived from conventional voltage pulses by alternately gating positive and negative timing circuits which control current flow. Passive circuit elements may also control the leading and trailing edge timing.
-
公开(公告)号：CA2112452C
公开(公告)日：1998-05-05
申请号：CA2112452
申请日：1989-10-02
Applicant: IBM
IPC: G06F11/10
Abstract: A record medium, such as a magnetic tape, optical disk, magnetic disk, and the like stores data signals and error redundancy signals. Resynchronization signals are inter-leaved between the recorded signals such that the error redundancy signals are usable to correct signals recorded between such interposed resynchronization signals wherein no error redundancy signals are recorded. Error pointing redundancy signals are recorded between all of the resynchro-nization signals for pointing to signals in error for enhancing the error correction. Such error pointing signals can be cyclic redundancy check (CRC) signals. Controls for taking advantage of the above-described arrangement are also described. Reframing and clock synchronization controls are also disclosed.
-
公开(公告)号：DE69019590T2
公开(公告)日：1996-01-18
申请号：DE69019590
申请日：1990-03-08
Applicant: IBM
Abstract: A record medium, such as a magnetic tape, optical disk, magnetic disk, and the like stores data signals and error redundancy signals. Re-synchronisation signals are interleaved between the recorded signals such that the error redundancy signals are usable to correct signals recorded between such interposed re-synchronisation signals wherein no error redundancy signals are recorded. Error pointing redundancy signals are recorded between all of the re-synchronisation signals for pointing to signals in error for enhancing the error correction. Such error pointing signals can be cyclic redundancy check (CRC) signals. Controls for taking advantage of the above-described arrangement are also described. Reframing and clock synchronisation controls are also disclosed.
-
公开(公告)号：BR9001936A
公开(公告)日：1991-07-30
申请号：BR9001936
申请日：1990-04-26
Applicant: IBM
Abstract: A record medium, such as a magnetic tape, optical disk, magnetic disk, and the like stores data signals and error redundancy signals. Re-synchronisation signals are interleaved between the recorded signals such that the error redundancy signals are usable to correct signals recorded between such interposed re-synchronisation signals wherein no error redundancy signals are recorded. Error pointing redundancy signals are recorded between all of the re-synchronisation signals for pointing to signals in error for enhancing the error correction. Such error pointing signals can be cyclic redundancy check (CRC) signals. Controls for taking advantage of the above-described arrangement are also described. Reframing and clock synchronisation controls are also disclosed.
-
Patent Agency Ranking
公开(公告)号：DE2443394A1
公开(公告)日：1975-04-03
申请号：DE2443394
申请日：1974-09-11
Applicant: IBM
Inventor： SCHNEIDER RICHARD CRANE
Abstract: A digital signal recording system for recording on records having first and second signal-state levels for data values recorded within bit cells on the media. The duration of each of two discrete signal states in each bit cell are equal. In a first signal set, an odd number of transitions represent a first data value; while in a second signal set, an even number of transitions represents a second data value. One of the signal sets representing one of said data values has a higher frequency component for effectively tending to linearize the recording channel for minimizing peak shift while maintaining high data integrity and self-clocking characteristics. The transitions to be detected for recovering recorded data values are but a small number of the transitions actually recorded. The read-back signal has good resolution, less peak shift and dynamic range.
-
公开(公告)号：AU623724B2
公开(公告)日：1992-05-21
申请号：AU4766090
申请日：1990-01-03
Applicant: IBM
Abstract: A record medium, such as a magnetic tape, optical disk, magnetic disk, and the like stores data signals and error redundancy signals. Re-synchronisation signals are interleaved between the recorded signals such that the error redundancy signals are usable to correct signals recorded between such interposed re-synchronisation signals wherein no error redundancy signals are recorded. Error pointing redundancy signals are recorded between all of the re-synchronisation signals for pointing to signals in error for enhancing the error correction. Such error pointing signals can be cyclic redundancy check (CRC) signals. Controls for taking advantage of the above-described arrangement are also described. Reframing and clock synchronisation controls are also disclosed.
-
公开(公告)号：AU4766090A
公开(公告)日：1990-11-01
申请号：AU4766090
申请日：1990-01-03
Applicant: IBM
Abstract: A record medium, such as a magnetic tape, optical disk, magnetic disk, and the like stores data signals and error redundancy signals. Re-synchronisation signals are interleaved between the recorded signals such that the error redundancy signals are usable to correct signals recorded between such interposed re-synchronisation signals wherein no error redundancy signals are recorded. Error pointing redundancy signals are recorded between all of the re-synchronisation signals for pointing to signals in error for enhancing the error correction. Such error pointing signals can be cyclic redundancy check (CRC) signals. Controls for taking advantage of the above-described arrangement are also described. Reframing and clock synchronisation controls are also disclosed.
-
公开(公告)号：DE3477706D1
公开(公告)日：1989-05-18
申请号：DE3477706
申请日：1984-08-08
Applicant: IBM
Inventor： SONU GENE HO , SCHNEIDER RICHARD CRANE
Abstract: An automatic amplitude equalizer for magnetic recording channels which utilizes a readback training sequence, monitors the total power lost during the training sequence due to channel variations, and automatically adjusts the channel signal in response to the power loss factor.
-
公开(公告)号：DE3472323D1
公开(公告)日：1988-07-28
申请号：DE3472323
申请日：1984-10-16
Applicant: IBM
Inventor： GRAVES DAVID CONRAD , SCHNEIDER RICHARD CRANE , ZIMMERMANN VOLKER
Abstract: @ An adaptive equalization circuit for magnetic recording channels which derives an error signal to change the equalizer compensation value from the timing of random signal data and provides continuous feedback compensation.In the Figure data from read head (21a) is amplified by amplifier (22a) and partially equalized in fixed equalizer (23a). The signal is applied to summation circuit (49) which receives a variable correction input signal. The summed signal is applied to data pulser circuit (24a) which provides output pulses to detector circuit (26a) and variable frequency clock (25a) at times of positive or negative peaks in the . received signal. The correction signal is derived from an equalization filter circuit (48) controlled by the output of a variable gain amplifier (47), the gain of which is set by the voltage on line (65). This voltage is determined by circuitry (69) from the three input supplied thereto.
-
-
-
-
-
-
-
-
-
Search Results
14
records
(took 0.02 seconds)
