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公开(公告)号：CA1209270A
公开(公告)日：1986-08-05
申请号：CA462901
申请日：1984-09-11
Applicant: IBM
Inventor： GUYETTE RICHARD R , HALL EDDIE T , MERITT ALLAN S , NEWSON STEPHEN R , SCALZI CASPER A , SEARS GLENN W JR
Abstract: The disclosure provides a unique multiprocessing (MP) method for executing on plural CPUs of the MP a uniprocessor system (UPS) program not written to run on a MP system. Separate copies of the UPS are provided in the shared main storage (MS) of the MP. A hypervisor type of control program (called a partitioned multiprocessing system, PMP) uses the MP method to enable simultaneous execution of the plural copies of a UPS on different CPUs of the MP as UPS guest virtual machines. PMP can dedicate any CPU to the sole execution of a particular copy of UPS. The copies of the UPS run on the different CPUs independently of each other, but they may share I/O devices. PMP may run with a virtual machine (VM) type of job entry and task dispatching control programming system designed to operate on CPUs having 370-XA architecture and to use emulation on the CPUs to permit a UPS designed for the same or another architecture (e.g. S/360 or S/370) to execute on the 370-XA CPUs as a UPS guest by using an emulation instruction (e.g. start interpretive execution, SIE). Efficient direct I/O handling for the executing UPS copies (i.e. UPS guests) requires the MS boundary of each UPS to be located at a different 2n byte absolute address, so that the I/O processor can easily translate channel program and I/O data addresses used by each UPS to the actual absolute MS addresses of the MP, n being the number of bits in the effective address used by the UPS. Zone parameters are derived from the 2n boundary addresses for the respective guests. This channel translation does not require any translation tables and can avoid a MS access for each translation. A CPU may use segment and page tables to translate UPS addresses for any UPS guest's CPU requests.
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