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公开(公告)号：DE68922444D1
公开(公告)日：1995-06-08
申请号：DE68922444
申请日：1989-07-14
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , HO LUNG MICHAEL GEORGE , MANDALIA BAIJU DHIRAJLAL , MILLAS ROLAN JOSE , ORTEGA OSCAR EMILIO , PICON RAFAEL JOSE , QUEEN LORAN RAY , ROBINSON RICHARD HOUSTON , ROBINSON WILLIAM ROBERT , SHARP LEO ALVIN , VAN DEN BERG JAN WOUTER
Abstract: A dual digital signal processor (DSP) provides real time links between multiple time division channels of a digital carrier system (e.g. T-1) and a host data processor. Operating only on digital signals, internally and at its interfaces to the carrier and host systems, the DSP exchanges data and control signalling information with the carrier system and data and control information with the host processor, converting the data in passage to different digital forms. At the interface to the carrier system, signals are received and transmitted in a form adapted to diverse terminal equipment of users remotely linked to the carrier system via the switched public network. At the host interface, signals are transferred and received in a form suited to the data process requirements of the host system (e.g. data bytes directly representing alphanumeric characters). Thus, the DSP acts as the equivalent of multiple different types of modems in performing required conversions. The DSP may also perform processing services in order to reduce the processing burden on the host system (e.g. parity checking of data, detection of specific character functions in data or specific tones in audio signals, selective routing of voice to host storage for voice mail applications, etc.)
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公开(公告)号：AU1027883A
公开(公告)日：1983-07-21
申请号：AU1027883
申请日：1983-01-11
Applicant: IBM
Inventor： MENDELSON RICHARD NEIL , NEAL DOUGLAS MARCUS O , SHARP LEO ALVIN
Abstract: There is disclosed apparatus and a method for extending a parallel channel of the host processor over a serial link to a remote peripheral device. The apparatus includes a microprocessor within I/O channel extension logic which responds to either instructions or data from a host processor. The instructions are of the type commanding the I/O device to perform a specific operation and the data is provided in response to requests for data from the I/O device. The channel extension logic is coupled to the host processor's channel and thus is able to obtain data from the host storage by cycle steal techniques. Within the channel extension logic are means to serialize the information and transmit it in a serial manner over the link. The microprocessor within the channel extension logic creates a frame, including a control byte, which identifies the type of information followed by the data, which frame is then communicated over the serial link to the I/O device. The I/O device also includes a microprocessor and associated logic which responds to the frames communicated by the channel extension logic and generates a frame consisting of a control byte identifying the information type and associated data which is then communicated back over the serial link to the channel extension logic to request action by the channel extension logic or indicate completion of the operation. The I/O device may, for instance, request data be obtained from or stored in the host memory by cycle steal techniques and thereby utilize the features of the host and host channel despite only being coupled thereto by a serial link.
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公开(公告)号：DE68922444T2
公开(公告)日：1996-02-15
申请号：DE68922444
申请日：1989-07-14
Applicant: IBM
Inventor： DAVIS GORDON TAYLOR , HO LUNG MICHAEL GEORGE , MANDALIA BAIJU DHIRAJLAL , MILLAS ROLAN JOSE , ORTEGA OSCAR EMILIO , PICON RAFAEL JOSE , QUEEN LORAN RAY , ROBINSON RICHARD HOUSTON , ROBINSON WILLIAM ROBERT , SHARP LEO ALVIN , VAN DEN BERG JAN WOUTER
Abstract: A dual digital signal processor (DSP) provides real time links between multiple time division channels of a digital carrier system (e.g. T-1) and a host data processor. Operating only on digital signals, internally and at its interfaces to the carrier and host systems, the DSP exchanges data and control signalling information with the carrier system and data and control information with the host processor, converting the data in passage to different digital forms. At the interface to the carrier system, signals are received and transmitted in a form adapted to diverse terminal equipment of users remotely linked to the carrier system via the switched public network. At the host interface, signals are transferred and received in a form suited to the data process requirements of the host system (e.g. data bytes directly representing alphanumeric characters). Thus, the DSP acts as the equivalent of multiple different types of modems in performing required conversions. The DSP may also perform processing services in order to reduce the processing burden on the host system (e.g. parity checking of data, detection of specific character functions in data or specific tones in audio signals, selective routing of voice to host storage for voice mail applications, etc.)
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公开(公告)号：AU559166B2
公开(公告)日：1987-02-26
申请号：AU1027883
申请日：1983-01-11
Applicant: IBM
Inventor： MENDELSON RICHARD NEIL , NEAL DOUGLAS MARCUS O , SHARP LEO ALVIN
Abstract: There is disclosed apparatus and a method for extending a parallel channel of the host processor over a serial link to a remote peripheral device. The apparatus includes a microprocessor within I/O channel extension logic which responds to either instructions or data from a host processor. The instructions are of the type commanding the I/O device to perform a specific operation and the data is provided in response to requests for data from the I/O device. The channel extension logic is coupled to the host processor's channel and thus is able to obtain data from the host storage by cycle steal techniques. Within the channel extension logic are means to serialize the information and transmit it in a serial manner over the link. The microprocessor within the channel extension logic creates a frame, including a control byte, which identifies the type of information followed by the data, which frame is then communicated over the serial link to the I/O device. The I/O device also includes a microprocessor and associated logic which responds to the frames communicated by the channel extension logic and generates a frame consisting of a control byte identifying the information type and associated data which is then communicated back over the serial link to the channel extension logic to request action by the channel extension logic or indicate completion of the operation. The I/O device may, for instance, request data be obtained from or stored in the host memory by cycle steal techniques and thereby utilize the features of the host and host channel despite only being coupled thereto by a serial link.
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