Abstract:
Apparatus for detecting multiplication errors in digital computers where multiplication is executed by iterative addition. A predicted residue is generated for each iteration by modifying the residue of the previous partial product according to the multiplier bits in the current iteration and the multiplicand residue. The current partial product is obtained and its residue generated. The generated current partial product residue is compared to the predicted residue for the current iteration to determine whether a hardware error has occurred. The process is repeated for each iteration, thereby eliminating the possibility of offsetting errors.
Abstract:
Apparatus for detecting multiplication errors in digital computers where multiplication is executed by iterative addition. A predicted residue is generated for each iteration by modifying the residue of the previous partial product according to the multiplier bits in the current iteration and the multiplicand residue. The current partial product is obtained and its residue generated. The generated current partial product residue is compared to the predicted residue for the current iteration to determine whether a hardware error has occurred. The process is repeated for each iteration, thereby eliminating the possibility of offsetting errors.