公开(公告)号：DE68923334T2

公开(公告)日：1996-03-07

申请号：DE68923334

申请日：1989-09-12

Applicant: IBM

Inventor： CAVALIERE JOSEPH RICHARD ,  SMITH GEORGE EARL

IPC: H03K19/00 ,  H03K19/003 ,  H03K19/086

Abstract: A current switch emitter-follower logic circuit allows both the UP output logic level and the DOWN output logic level to be independently controlled with respect to a fixed reference voltage so as to permit very small output level swings. A feedback circuit (40) generates two different control signals (VCS, VCCC) which are independently variable and are input to a control circuit (42) and to a logic circuit (1) to compensate for fluctuations in power supply voltages, temperature and circuit parameters. These control signals are applied to a variable current source within the logic circuit and to a dynamic resistance within the control circuit to compensate almost instantaneously to fluctuations in power supply voltage, temperature or circuit device parameters, maintaining the logic circuit output levels close to reference levels so as to permit small output signal swings. The output logic levels need not be symmetrical around a central reference point.

公开(公告)号：DE68923334D1

公开(公告)日：1995-08-10

申请号：DE68923334

申请日：1989-09-12

Applicant: IBM

Inventor： CAVALIERE JOSEPH RICHARD ,  SMITH GEORGE EARL

IPC: H03K19/00 ,  H03K19/003 ,  H03K19/086

Abstract: A current switch emitter-follower logic circuit allows both the UP output logic level and the DOWN output logic level to be independently controlled with respect to a fixed reference voltage so as to permit very small output level swings. A feedback circuit (40) generates two different control signals (VCS, VCCC) which are independently variable and are input to a control circuit (42) and to a logic circuit (1) to compensate for fluctuations in power supply voltages, temperature and circuit parameters. These control signals are applied to a variable current source within the logic circuit and to a dynamic resistance within the control circuit to compensate almost instantaneously to fluctuations in power supply voltage, temperature or circuit device parameters, maintaining the logic circuit output levels close to reference levels so as to permit small output signal swings. The output logic levels need not be symmetrical around a central reference point.