公开(公告)号：HU0302843A2

公开(公告)日：2003-12-29

申请号：HU0302843

申请日：2001-01-31

Applicant: IBM

Inventor： BIRAN GIORA ,  MACHULSKY GEORGY ,  SCHILLER CLAUDIU ,  SOSTHEIM TAL

IPC: G06F3/00 ,  G06F13/24

Abstract: Methods, systems and apparatus for transferring interrupts from a peripheral device to a host computer system is described. In an example embodiment, an apparatus comprises a buffer for storing indications of interrupts generated by the peripheral device. In response to a preset condition being met, a controller generates a control data block having a payload portion, moves the contents of the buffer to the payload portion of the control data block, and sends the control data block to the host computer system.

公开(公告)号：CZ20032079A3

公开(公告)日：2003-12-17

申请号：CZ20032079

申请日：2001-01-31

Applicant: IBM

Inventor： BIRAN GIORA ,  SOSTHEIM TAL ,  MACHULSKY GEORGY ,  SCHILLER CLAUDIU

IPC: G06F3/00 ,  G06F13/24

Abstract: Methods, systems and apparatus for transferring interrupts from a peripheral device to a host computer system is described. In an example embodiment, an apparatus comprises a buffer for storing indications of interrupts generated by the peripheral device. In response to a preset condition being met, a controller generates a control data block having a payload portion, moves the contents of the buffer to the payload portion of the control data block, and sends the control data block to the host computer system.

公开(公告)号：PL363432A1

公开(公告)日：2004-11-15

申请号：PL36343201

申请日：2001-01-31

Applicant: IBM

Inventor： BIRAN GIORA ,  MACHULSKY GEORGY ,  SCHILLER CLAUDIU ,  SOSTHEIM TAL

IPC: G06F3/00 ,  G06F13/24

Abstract: Methods, systems and apparatus for transferring interrupts from a peripheral device to a host computer system is described. In an example embodiment, an apparatus comprises a buffer for storing indications of interrupts generated by the peripheral device. In response to a preset condition being met, a controller generates a control data block having a payload portion, moves the contents of the buffer to the payload portion of the control data block, and sends the control data block to the host computer system.

公开(公告)号：CA2432387A1

公开(公告)日：2002-08-08

申请号：CA2432387

申请日：2001-01-31

Applicant: IBM

Inventor： BIRAN GIORA ,  SOSTHEIM TAL

IPC: G06F13/00 ,  G06F13/40 ,  H04L12/26 ,  H04L12/56

Abstract: Apparatus is described for controlling flow of data between first and second data processing systems via a memory. The apparatus comprises descriptor log ic for generating a plurality of descriptors including a frame descriptor defining a data packet to be communicated between a location in the memory a nd the second data processing system, and a pointer descriptor identifying the location in the memory. The apparatus also comprises a descriptor table for storing the descriptors generated by the descriptor logic for access by the first and second data processing systems.

公开(公告)号：PL362792A1

公开(公告)日：2004-11-02

申请号：PL36279201

申请日：2001-01-31

Applicant: IBM

Inventor： BIRAN GIORA ,  SOSTHEIM TAL

IPC: G06F13/00 ,  G06F13/40 ,  H04L12/26 ,  H04L12/56

Abstract: Apparatus, methods and systems for controlling data flow between data processing systems. In an example embodiment, the apparatus includes descriptor logic for generating a plurality of descriptors including a frame descriptor defining a data packet to be communicated between a location in the memory and a data processing system, and a pointer descriptor identifying the location in the memory. The apparatus also includes a descriptor table for storing descriptors generated by the descriptor logic for access by the data processing systems.

公开(公告)号：HU0302879A2

公开(公告)日：2003-12-29

申请号：HU0302879

申请日：2001-01-31

Applicant: IBM

Inventor： BIRAN GIORA ,  SOSTHEIM TAL

IPC: G06F13/00 ,  G06F13/40 ,  H04L12/26 ,  H04L12/56

Abstract: Apparatus, methods and systems for controlling data flow between data processing systems. In an example embodiment, the apparatus includes descriptor logic for generating a plurality of descriptors including a frame descriptor defining a data packet to be communicated between a location in the memory and a data processing system, and a pointer descriptor identifying the location in the memory. The apparatus also includes a descriptor table for storing descriptors generated by the descriptor logic for access by the data processing systems.

公开(公告)号：CZ20032078A3

公开(公告)日：2003-11-12

申请号：CZ20032078

申请日：2001-01-31

Applicant: IBM

Inventor： BIRAN GIORA ,  SOSTHEIM TAL

IPC: G06F13/00 ,  G06F13/40 ,  H04L12/26 ,  H04L12/56

Abstract: Apparatus, methods and systems for controlling data flow between data processing systems. In an example embodiment, the apparatus includes descriptor logic for generating a plurality of descriptors including a frame descriptor defining a data packet to be communicated between a location in the memory and a data processing system, and a pointer descriptor identifying the location in the memory. The apparatus also includes a descriptor table for storing descriptors generated by the descriptor logic for access by the data processing systems.

公开(公告)号：CA2432390A1

公开(公告)日：2002-08-08

申请号：CA2432390

申请日：2001-01-31

Applicant: IBM

Inventor： SOSTHEIM TAL ,  BIRAN GIORA

IPC: G06F13/00 ,  G06F9/46 ,  G06F13/14 ,  G06F13/40

Abstract: Apparatus for controlling flow of data between a memory of a host computer system and a data communications interface for communicating data between th e host computer system and a data communications network is described. The apparatus comprises a descriptor table for storing a plurality of descriptor s for access by the host computer system and data communications interface. Descriptor logic generates the descriptors for storage in the descriptor table. The descriptors include a branch descriptor comprising a link to another descriptor in the table.

公开(公告)号：CA2432386A1

公开(公告)日：2002-08-08

申请号：CA2432386

申请日：2001-01-31

Applicant: IBM

Inventor： BIRAN GIORA ,  MACHULSKY GEORGY ,  SCHILLER CLAUDIU ,  SOSTHEIM TAL

IPC: G06F3/00 ,  G06F13/24

Abstract: Apparatus for transferring interrupts form a peripheral device to a host computer system is described. The apparatus comprises a buffer for storing indications of interrupts generated by the peripheral device. In response to a preset condition being met, a controller generates a control data block havi ng a payload portion, moves the contents of the buffer to the payload poriton o f the control data block, and sends the control data block to the host compute r system.