1.
    发明专利
    未知

    公开(公告)号:DE69624088D1

    公开(公告)日:2002-11-07

    申请号:DE69624088

    申请日:1996-07-22

    Applicant: IBM

    Abstract: The system includes an adapter processor and control memory device included in the adapter. A device is provided for establishing transmit and receive control registers in the control memory. A device is used for receiving data cells from the network for storage as frames on received ready lists in system memory. A device is incorporated for establishing a transmit ready queue (TRQ) in the control memory. Transmit ready queue (TRQ) identifies frames for transmission on a received ready list. A device is provided for establishing in system memory a transmit complete list (TCL). A device is further included for generating an interrupt to the device driver indicating frame transmission complete and updating the TCL.

    2.
    发明专利
    未知

    公开(公告)号:DE69624088T2

    公开(公告)日:2003-06-18

    申请号:DE69624088

    申请日:1996-07-22

    Applicant: IBM

    Abstract: The system includes an adapter processor and control memory device included in the adapter. A device is provided for establishing transmit and receive control registers in the control memory. A device is used for receiving data cells from the network for storage as frames on received ready lists in system memory. A device is incorporated for establishing a transmit ready queue (TRQ) in the control memory. Transmit ready queue (TRQ) identifies frames for transmission on a received ready list. A device is provided for establishing in system memory a transmit complete list (TCL). A device is further included for generating an interrupt to the device driver indicating frame transmission complete and updating the TCL.

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