1.
    发明专利
    未知

    公开(公告)号:DE68925263D1

    公开(公告)日:1996-02-08

    申请号:DE68925263

    申请日:1989-07-07

    Applicant: IBM

    Abstract: A combining switch that reduces memory accesses, synchronizes parallel processors (10) and is easy to implement, is achieved by configuring a plurality of parallel processing nodes in a ring arrangement and by implementing a synchronizing instruction for the switch that facilitates, rather then inhibits, parallel processing. According to the preferred embodiment of the invention the ring is a token ring and the synchronizing instruction is a Fetch-and-Add instruction.

    2.
    发明专利
    未知

    公开(公告)号:DE68924934D1

    公开(公告)日:1996-01-11

    申请号:DE68924934

    申请日:1989-06-27

    Applicant: IBM

    Abstract: A parallel synchronization technique utilizing a combining network in which two processors synchronize by having one processor suspend operation while the other processor becomes the agent for the one processor, while continuing to operate on its own behalf. This reduces the access requests and subsequent contention caused by multiple concurrent requests to a common variable.

    3.
    发明专利
    未知

    公开(公告)号:DE68924013T2

    公开(公告)日:1996-04-18

    申请号:DE68924013

    申请日:1989-06-15

    Applicant: IBM

    Abstract: A mechanism within a disk controller that computes the number of distinct sectors referenced as a function of either real or virtual time. This so-called "footprint" function can be used by the disk controller as input for an algorithm that attempts to optimize cache performance.

    4.
    发明专利
    未知

    公开(公告)号:DE68924013D1

    公开(公告)日:1995-10-05

    申请号:DE68924013

    申请日:1989-06-15

    Applicant: IBM

    Abstract: A mechanism within a disk controller that computes the number of distinct sectors referenced as a function of either real or virtual time. This so-called "footprint" function can be used by the disk controller as input for an algorithm that attempts to optimize cache performance.

    5.
    发明专利
    未知

    公开(公告)号:DE68925263T2

    公开(公告)日:1996-07-11

    申请号:DE68925263

    申请日:1989-07-07

    Applicant: IBM

    Abstract: A combining switch that reduces memory accesses, synchronizes parallel processors (10) and is easy to implement, is achieved by configuring a plurality of parallel processing nodes in a ring arrangement and by implementing a synchronizing instruction for the switch that facilitates, rather then inhibits, parallel processing. According to the preferred embodiment of the invention the ring is a token ring and the synchronizing instruction is a Fetch-and-Add instruction.

    6.
    发明专利
    未知

    公开(公告)号:DE68924934T2

    公开(公告)日:1996-06-13

    申请号:DE68924934

    申请日:1989-06-27

    Applicant: IBM

    Abstract: A parallel synchronization technique utilizing a combining network in which two processors synchronize by having one processor suspend operation while the other processor becomes the agent for the one processor, while continuing to operate on its own behalf. This reduces the access requests and subsequent contention caused by multiple concurrent requests to a common variable.

    7.
    发明专利
    未知

    公开(公告)号:DE3788830T2

    公开(公告)日:1994-06-23

    申请号:DE3788830

    申请日:1987-05-08

    Applicant: IBM

    Abstract: An adaptive mechanism is presented in the context of optimization of expert system applications. Both single and multiple processor implementations are disclosed. The mechanism is used to maintain a near-optimal sequence for scanning rule lists in expert systems. For a program containing a sequential-decision, chain with many independent or mutually exclusive outcomes with each decision having associated with it some fixed cost and probability, the adaptive mechanism tends to produce the optimal ordering automatically from repeated observations of the execution of the decision chain.

    8.
    发明专利
    未知

    公开(公告)号:DE3788830D1

    公开(公告)日:1994-03-03

    申请号:DE3788830

    申请日:1987-05-08

    Applicant: IBM

    Abstract: An adaptive mechanism is presented in the context of optimization of expert system applications. Both single and multiple processor implementations are disclosed. The mechanism is used to maintain a near-optimal sequence for scanning rule lists in expert systems. For a program containing a sequential-decision, chain with many independent or mutually exclusive outcomes with each decision having associated with it some fixed cost and probability, the adaptive mechanism tends to produce the optimal ordering automatically from repeated observations of the execution of the decision chain.

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