公开(公告)号：CA1092654A

公开(公告)日：1980-12-30

申请号：CA282527

申请日：1977-07-12

Applicant: IBM

Inventor： CHOQUET MICHEL ,  PILOST DANIEL ,  VADE ANDRE

IPC: H04L7/00

Abstract: SYNCHRONIZING DEVICE FOR THE RECEIVER CLOCK OF A DATA TRANSMISSION SYSTEM USING PSK MODULATION This invention relates to a new clock synchronizing arrangement for use in -the receiving device of a data transmission system employing PSK modulation. In PSK systems, the received signal x(t), for a given carrier angular frequency .omega.c can be defined by its envelope and its phase r (t) and ?(t), respectively. r(t) and ?(t) can be expressed by: and where x(t) is the Hilbert Transform of x(t). At the optimum signalling instant topt, r(topt) and ?(topt) normalized (without the data) exhibit the minimum variance. The clock adjustment signal is derived from the variance of the envelope or the variance of the phase of the received signal.

公开(公告)号：AU2830077A

公开(公告)日：1979-03-08

申请号：AU2830077

申请日：1977-08-29

Applicant: IBM

Inventor： CHOQUET MICHEL ,  PILOST DANIEL ,  VADE ANDRE

IPC: H04J3/14 ,  H04L7/00 ,  H04L7/02 ,  H04L7/033 ,  H04L7/04 ,  H04L7/10 ,  H04L27/22

Abstract: This invention relates to a new clock synchronizing arrangement for use in the receiving device of a data transmission system employing PSK modulation.

公开(公告)号：FR2358056A1

公开(公告)日：1978-02-03

申请号：FR7621564

申请日：1976-07-09

Applicant: IBM FRANCE

Inventor： CHOQUET MICHEL ,  PILOST DANIEL ,  VADE ANDRE

IPC: H04J3/14 ,  H04L7/00 ,  H04L7/02 ,  H04L7/033 ,  H04L7/04 ,  H04L7/10 ,  H04L27/22 ,  H03K9/04 ,  H04B1/16

Abstract: This invention relates to a new clock synchronizing arrangement for use in the receiving device of a data transmission system employing PSK modulation.

公开(公告)号：CH624518A5

公开(公告)日：1981-07-31

申请号：CH831077

申请日：1977-07-06

Applicant: IBM

Inventor： CHOQUET MICHEL ,  PILOST DANIEL ,  VADE ANDRE

IPC: H04J3/14 ,  H04L7/00 ,  H04L7/02 ,  H04L7/033 ,  H04L7/04 ,  H04L7/10 ,  H04L27/22 ,  H04B12/04

Abstract: This invention relates to a new clock synchronizing arrangement for use in the receiving device of a data transmission system employing PSK modulation.

公开(公告)号：DE2729312A1

公开(公告)日：1978-01-19

申请号：DE2729312

申请日：1977-06-29

Applicant: IBM

Inventor： CHOQUET MICHEL ,  PILOST DANIEL ,  VADE ANDRE

IPC: H04J3/14 ,  H04L7/00 ,  H04L7/02 ,  H04L7/033 ,  H04L7/04 ,  H04L7/10 ,  H04L27/22

Abstract: This invention relates to a new clock synchronizing arrangement for use in the receiving device of a data transmission system employing PSK modulation.