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公开(公告)号:DE3577481D1
公开(公告)日:1990-06-07
申请号:DE3577481
申请日:1985-09-10
Applicant: IBM
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公开(公告)号:DE3267552D1
公开(公告)日:1986-01-02
申请号:DE3267552
申请日:1982-06-02
Applicant: IBM
IPC: G01R31/26 , G01R31/28 , G01R31/319 , H01L21/66 , G06F11/00
Abstract: A test system for testing circuits in integrated circuit chips includes a host computer for controlling the test system, and a plurality of blocks operable in parallel and each including a controller, storage for test programs and test data, and plurality of electronic units or pin electronics cards, one unit being associated with one of the pins of a device under test. Each of the electronic units include timing circuitry for timing its associated pin independent of the timing of any other electronics unit.
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