公开(公告)号：DE69215090T2

公开(公告)日：1997-04-30

申请号：DE69215090

申请日：1992-08-25

Applicant: IBM

Inventor： DIEBOLD ULRICH ,  ROST PETER ,  SCHMIDT MANFRED ,  TORREITER OTTO ,  VOGT ROLF ,  WAGNER-DREBENSTEDT KLAUS

IPC: G01R31/3183 ,  G01R31/3185 ,  G06F11/26

Abstract: The present invention provides for improved testing of an integrated circuit 1. In order to measure a signal S in circuit 1 a multi-pattern is placed in shift register 70. The multi-pattern is generated by overlaying at least two test patterns Ax and Bx. Therefore the signal S changes its state in response to only a small amount of shift operations.

公开(公告)号：DE69215090D1

公开(公告)日：1996-12-12

申请号：DE69215090

申请日：1992-08-25

Applicant: IBM

Inventor： DIEBOLD ULRICH ,  ROST PETER ,  SCHMIDT MANFRED ,  TORREITER OTTO ,  VOGT ROLF ,  WAGNER-DREBENSTEDT KLAUS

IPC: G01R31/3183 ,  G01R31/3185 ,  G06F11/26

Abstract: The present invention provides for improved testing of an integrated circuit 1. In order to measure a signal S in circuit 1 a multi-pattern is placed in shift register 70. The multi-pattern is generated by overlaying at least two test patterns Ax and Bx. Therefore the signal S changes its state in response to only a small amount of shift operations.