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公开(公告)号：US3890460A
公开(公告)日：1975-06-17
申请号：US42816673
申请日：1973-12-26
Applicant: IBM
Inventor： HAAS LEE C , WEST LYNN PARKER
IPC: G06F13/00 , G06F13/22 , H04L12/403 , H04Q5/00
CPC classification number: H04L12/40006 , G06F13/225 , H04L12/403
Abstract: A communications enabling method and apparatus are disclosed in which the mean response time for the receipt of service from a central station at any one of a plurality of remote stations on a duplex communications channel network is reduced. The method and apparatus are designed to enable entire populations of remote stations or terminals, which potentially are awaiting service and have messages or data to transmit to use the channel. If only one response is received from such an enabling technique, the data is taken and the population is re-enabled. If more than one response is received and the responses conflict with one another, a reenable sequence is conducted for some lesser plurality or sub group of the entire population until the contending responses are eliminated. The technique utilized is a partitioned search which eliminates contending stations in a rapid and effective manner.
Abstract translation: 公开了一种通信使能方法和装置，其中减少了来自双工通信信道网络上的多个远程站中的任一个的中心站的服务的接收的平均响应时间。 该方法和装置被设计成使得远程站或终端的整个群体可能正在等待服务并且具有消息或数据来传送以使用该信道。 如果从这种启用技术仅接收到一个响应，则采取数据并重新启用总体。 如果接收到多个响应并且响应彼此冲突，则对整个群体的一些较小的多个或子组进行重新启用序列，直到消除竞争响应。 所采用的技术是以快速有效的方式消除竞争站的分区搜索。
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公开(公告)号：JPS6288432A
公开(公告)日：1987-04-22
申请号：JP19303386
申请日：1986-08-20
Applicant: IBM
Inventor： WEST LYNN PARKER
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公开(公告)号：DE3687684D1
公开(公告)日：1993-03-18
申请号：DE3687684
申请日：1986-08-29
Applicant: IBM
Inventor： WEST LYNN PARKER
Abstract: Automatic gain control in a digital signal processor is described. A predetermined threshold value, a predetermined automatic gain control value, and a predetermined count threshold value are established and stored in a data memory associated with a signal processor. Each incoming signal sample that is received is multiplied by the AGC value with the product being temporarily stored in the data memory. The absolute value of the resulting product is taken and added to the predetermined threshold value. If the result of this operation results in a signal processor overflow, then the AGC value is reduced and stored back into the data memory. The adjustment period of the AGC value is chosen to be well under the allowable distortion time for speech, dual tone multi-frequency reception, and modem operation.
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公开(公告)号：DE2304266A1
公开(公告)日：1973-11-15
申请号：DE2304266
申请日：1973-01-30
Applicant: IBM
Inventor： DIXON ROY CONRAD , HASH LARRY JOSEPH , MARKOV JAMES DONOVAN , WEST LYNN PARKER
IPC: G06F13/00 , G06F13/372 , G06F13/38 , H04L12/423 , G06F3/04
Abstract: Bidirectionally communicating terminals are connected to a serial loop by interfaces which provide no delay. Communications are effected in fixed length time slots which include an indicia of the state of the slot. Slots carrying data to a terminal have the state indicia set to value which indicates that the slot is in use. At the receiving terminal, the indicia is retained in the state if the terminal is to use the slot for transmitting data. If the receiving terminal has no data to send, the state indicia is reset to a different value. In the reset state, the slot is available to subsequent terminals for the transmission of data.
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公开(公告)号：DE3687684T2
公开(公告)日：1993-08-19
申请号：DE3687684
申请日：1986-08-29
Applicant: IBM
Inventor： WEST LYNN PARKER
Abstract: Automatic gain control in a digital signal processor is described. A predetermined threshold value, a predetermined automatic gain control value, and a predetermined count threshold value are established and stored in a data memory associated with a signal processor. Each incoming signal sample that is received is multiplied by the AGC value with the product being temporarily stored in the data memory. The absolute value of the resulting product is taken and added to the predetermined threshold value. If the result of this operation results in a signal processor overflow, then the AGC value is reduced and stored back into the data memory. The adjustment period of the AGC value is chosen to be well under the allowable distortion time for speech, dual tone multi-frequency reception, and modem operation.
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Patent Agency Ranking
公开(公告)号：DE3679283D1
公开(公告)日：1991-06-20
申请号：DE3679283
申请日：1986-08-26
Applicant: IBM
Inventor： EINKAUF MARK ALAN , WEST LYNN PARKER
Abstract: This invention enables voice energy to be distinguished from energy due to other sources such as telephone call progress signals. A portion of the audio spectrum is divided into a high and into a low frequency band and the energy content of these bands is examined. The audio energy of a signal is passed through a set of filters and compared. A frequency boundary crossing of an input signal subsequent to filtering is used to signify the receipt of a voice signal. By operating in this manner, voice, whose predominant frequency switches in a random fashion from being greater than to less than a cutoff frequency, can be distinguished from other signals either below or above the cutoff frequencies of the filters. The detection of voice energy is not begun until a predetermined threshold of energy has been received for a specified period of time. This specified period of time need not be continuous after a ringback signal is received. Subsequent to the receipt of a ringback signal, the voice detection mechanism will proceed as long as the total time above the threshold exceeds the specified time.
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公开(公告)号：AU529779B2
公开(公告)日：1983-06-23
申请号：AU4927279
申请日：1979-07-26
Applicant: IBM
Inventor： ALVAREZ JOSEPH ANTHONY III , GOBIOFF BRUCE DEAN , WEST LYNN PARKER
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公开(公告)号：DE2559006A1
公开(公告)日：1976-07-08
申请号：DE2559006
申请日：1975-12-29
Applicant: IBM
Inventor： MARKEYY HAROLD G , WEST LYNN PARKER
IPC: H04J3/00 , H04B7/15 , H04B7/185 , H04B7/212 , H04J3/17 , H04Q11/00 , H04Q11/04 , H04J6/02 , H04B7/14
Abstract: Digital exchange stations linked by earth satellite operate in a coordinately controllable time division switching and communication network system relative to externally attached telephone and data trunks. Modular switching equipment operating in coordination with satellite frames establishes and releases connection paths to trunk stores which interface with time and space domain channels of the system. Circuits through the system utilizing these paths are termed virtual connections because in different frames a circuit may be completed through different channels or even blocked under certain conditions. Telephone speech is converted between analog and digital forms relative to modular groups of 96 ports. Digital switching (slot interchange) equipment serving up to four groups (and cycling in coordination with satellite time division frames) cyclically completes local (intra-station) connections between ports and segments of toll (inter-station) connections between ports and locations in the trunk stores. The trunk stores comprise separate sections for system traffic bound to and from ports of the respective station. A duplicate arrangement of subsections in each section is alternately filled and emptied in successive frames; enabling the station to maintain continuity of communication relative to the system in successive frames. The 192 bit spaces of each location are filled in one frame and emptied in the next frame. Groups of 96 outbound locations are "virtually" associated for transmission with groups of 48 time division transmission channels of said facilities. The association operates by a process of selection termed voice activity compression (abbreviated VAC) based upon activity information developed at the port interface and carried through the switching equipment in positional association with trunk locations. The VAC process assigns only locations (virtual channels) containing activity to up to 46 of the 48 time channels, eliminating any excess of active virtual channels (over 46) in a selective order of priority. VAC mask information transmitted in a separate one of the 48 time channels indicates the virtual-to-real (96-to-46) assignment for the respective group in the respective frame. A bit in the mask for each virtual channel of the group indicates the assignment or elimination of the respective virtual channel. Assigned channels are transmitted in the time order of respective mask bits. Establishment of virtual connections is restricted system-wide by tables stored in the stations. These tables are subject to external modification and may contain path exclusion information enabling the system to remain effectively operational with inoperative elements.
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公开(公告)号：DE3789260T2
公开(公告)日：1994-09-22
申请号：DE3789260
申请日：1987-07-31
Applicant: IBM
Inventor： PEARCE HAROLD BRENT , WEST LYNN PARKER
Abstract: Automatic gain control in a digital signal processor is described. An incoming electrical signal is sampled and multiplied by a gain factor with the resulting product compared to a constantly changing maximum value. If the magnitude of the changing maximum value lies outside a predetermined range of values, then the gain factor is adjusted proportionally to the error calculated by the amount the maximum value is outside the threshold range. In an alternative embodiment, the gain is adjusted according to whether or not one of the resulting products lies outside such upper and lower threshold range. The running maximum value decays with time in order to allow the automatic gain control to track a signal which slowly weakens in strength. A time dependent factor enables the gain to be adjusted much more radically when a signal is first received.
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公开(公告)号：DE3783837T2
公开(公告)日：1993-08-19
申请号：DE3783837
申请日：1987-07-31
Applicant: IBM
Inventor： PEARCE HAROLD BRENT , WEST LYNN PARKER
IPC: H04L27/38 , H04L27/00 , H04L27/227
Abstract: A method and apparatus are described for phase and frequency locking a reference oscillator to an incoming modulated signal. The method and apparatus enable the carrier recovery of the incoming modulated signal. Phase and frequency locking devices are connected in feedback loops (20, 30) with a coherent detector (10) that determine the amount of phase and frequency error between the reference oscillator of the coherent detector and the incoming modulated signal. The feedback loops correct such frequency and phase error so as to enable the reference oscillator to be in phase and frequency step with the modulated signal.
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