公开(公告)号：US3615951A

公开(公告)日：1971-10-26

申请号：US3615951D

申请日：1969-06-20

Applicant: IBM

Inventor： FRANCO JACK R ,  TOTTA PAUL A ,  WHITE JAMES F

IPC: C23F1/02 ,  H01L21/00 ,  H01L23/522 ,  H05K3/06

CPC classification number: H05K3/067 ,  C23F1/02 ,  H01L21/00 ,  H01L23/522 ,  H01L2924/0002 ,  H05K2203/0315 ,  H05K2203/0369 ,  H05K2203/1142 ,  H05K2203/1157 ,  H01L2924/00

Abstract: A method for subtractive etching copper adapted to form very fine line patterns. In the method a mask is deposited on the copper surface, the copper surface exposed to an environment containing an oxidizing agent which causes the formation of an adherent self thickness limiting coating of a copper compound on the exposed surface, the resultant adherent coating removed in a second environment, and the steps of forming the coating and removing repeated until the desired amount of copper has been removed.

公开(公告)号：CA2009247C

公开(公告)日：1993-04-06

申请号：CA2009347

申请日：1990-02-05

Applicant: IBM

Inventor： RODBELL KENNETH P ,  TOTTA PAUL A ,  WHITE JAMES F

IPC: E04F13/21 ,  B60R9/00 ,  B60R13/01 ,  H01L23/532

Abstract: A sputtered low copper concentration multilayered, device interconnect metallurgy structure is disclosed herein. The interconnect metallization structure comprises a sputtered aluminum-copper (

公开(公告)号：CA2009247A1

公开(公告)日：1990-10-17

申请号：CA2009247

申请日：1990-02-02

Applicant: IBM

Inventor： RODBELL KENNETH P ,  TOTTA PAUL A ,  WHITE JAMES F

IPC: H01L23/52 ,  H01L21/28 ,  H01L21/285 ,  H01L21/3205 ,  H01L21/48 ,  H01L23/498 ,  H05K1/09 ,  H05K3/16 ,  H05K3/38

Abstract: A sputtered low copper concentration multilayered device interconnect metallurgy structure is disclosed herein. The interconnect metallurgy is seen to comprise a four-layer structure over an interplanar stud connection (10) surrounded by an insulator (8) to make connection to a device substrate (6). The four-layer structure consists of an intermetallic bottom layer (12 min ) typically 700 ANGSTROM thick and, in a preferred embodiment would comprise TiAl3. Above is a low percent (

公开(公告)号：CA1079867A

公开(公告)日：1980-06-17

申请号：CA287496

申请日：1977-09-26

Applicant: IBM

Inventor： HOWARD JAMES K ,  ROSENBERG WILLIAM D ,  WHITE JAMES F

IPC: H01L29/43 ,  H01L21/28 ,  H01L21/285 ,  H01L29/47 ,  H01L29/872 ,  H01L29/48

Abstract: AN IMPROVED SCHOTTKY BARRIER CONTACT AND METHODS OF FABRICATION THEREOF An aluminum-transition metal Schottky barrier contact, and methods of fabrication thereof are disclosed. In one preferred embodiment, the junction is comprised of an aluminum-tantalum intermetallic layer abutting a silicon substrate. Alternate embodiments utilize an intermetallic compound of a metal selected from the group of tantalum, zirconium, hafnium, niobium, titanium and nickel in combination with aluminum. The preferred embodiments can be fabricated by evaporation of a layer of a metal selected from the above mentioned group followed by evaporation of a layer of aluminum on a silicon substrate, after which an annealing step is utilized which creates the desired intermetallic compound in a layer abutting the silicon surface. Alternatively, the junction can be created by hot or cold sputtering of a preselected intermetallic compound of one of the metals with aluminum directly upon the silicon substrate, followed by deposition of a conductive layer such as aluminum. In the case of cold sputtering an annealing step is required to perfect the desired intermetallic compound structure; and in the case of hot sputtering an annealing step may be useful in perfecting the desired intermetallic structure, although it is not essential. The resulting devices are highly thermally stable with predictable barrier heights; and exhibit excellent electrical properties while they are capable of fabrication with good planarity.

公开(公告)号：FR2376519A1

公开(公告)日：1978-07-28

申请号：FR7735961

申请日：1977-11-21

Applicant: IBM

Inventor： HOWARD JAMES K ,  ROSENBERG WILLIAM D ,  WHITE JAMES F

IPC: H01L29/43 ,  H01L21/28 ,  H01L21/285 ,  H01L29/47 ,  H01L29/872 ,  H01L29/48 ,  H01L21/283

Abstract: An aluminum-transition metal Schottky barrier contact, and methods of fabrication thereof are disclosed. In one preferred embodiment, the junction is comprised of an aluminum-tantalum intermetallic layer abutting a silicon substrate. Alternate embodiments utilize an intermetallic compound of a metal selected from the group of tantalum, zirconium, hafnium, niobium, titanium and nickel in combination with aluminum. The preferred embodiments can be fabricated by evaporation of a layer of a metal selected from the above mentioned group followed by evaporation of a layer of aluminum on a silicon substrate, after which an annealing step is utilized which creates the desired intermetallic compound in a layer abutting the silicon surface. Alternatively, the junction can be created by hot or cold sputtering of a preselected intermetallic compound of one of the metals with aluminum directly upon the silicon substrate, followed by deposition of a conductive layer such as aluminum. In the case of cold sputtering an annealing step is required to perfect the desired intermetallic compound structure; and in the case of hot sputtering an annealing step may be useful in perfecting the desired intermetallic structure, although it is not essential. The resulting devices are highly thermally stable with predictable barrier heights; and exhibit excellent electrical properties while they are capable of fabrication with good planarity.

公开(公告)号：CA1140682A

公开(公告)日：1983-02-01

申请号：CA356143

申请日：1980-07-14

Applicant: IBM

Inventor： HOWARD JAMES K ,  WHITE JAMES F

IPC: H01L21/768 ,  H01L21/28 ,  H01L23/532 ,  H01L29/43 ,  H01L29/47 ,  H01L29/40

Abstract: In a conductor pattern for integrated circuits, the use of barrier layers of TiW and selected transition metals between gold and a silicon substrate, with the transition metal containing a supplemental barrier region or stratum of an intermetallic formed between it and the gold. Also comprehended is the use of a platinum silicide layer between the TiW layer and silicon for Schottky Barrier Diodes.

公开(公告)号：CA890894A

公开(公告)日：1972-01-18

申请号：CA890894D

Applicant: IBM

Inventor： FRANCO JACK R ,  TOTTA PAUL A ,  WHITE JAMES F

IPC: C23F1/02 ,  H01L21/00 ,  H01L23/522 ,  H05K3/06

公开(公告)号：CA1126629A

公开(公告)日：1982-06-29

申请号：CA348144

申请日：1980-03-21

Applicant: IBM

Inventor： ROTHMAN LAURA B ,  TOTTA PAUL A ,  WHITE JAMES F

IPC: H01L21/306 ,  H01L21/027 ,  H01L21/28 ,  H01L21/285 ,  H01L21/338 ,  H01L23/485 ,  H01L21/283

Abstract: A method for forming thin film patterns in the fabrication of integrated circuits utilizing a lift-off mask in an inverse vertical relationship with the desired metal film. The method involves the preliminary blanket deposition of the metal in-point, followed by a coating of a patterned lift-off mask over which is blanket coated a dryetch resistant material with subsequent removal of the lift-off mask, and dry etching of the exposed metal film. In one embodiment the dry-etch mask can comprise a diverse metal layer when a dry-etch ambient is employed which is passive to the d;verse metal. In another embodiment, where dry etch ambients are employed which are corrosive to the diverse metal which is desired in the final structure, it can be covered with a blanket layer of any convenient dry-etch resistant material, such as magnesium oxide, prior to removal of the lift-off mask. This method has effective application in the fabrication of Schottky barrier diodes, transistors, and other electronic components or discrete and integrated devices requiring high quality metal to semiconductor junctions or interfaces.