公开(公告)号：DE1962829A1

公开(公告)日：1970-07-16

申请号：DE1962829

申请日：1969-12-15

Applicant: IBM

Inventor： WILLIAM EMERSON LAWRENCE ,  ABRAMSON PAUL

IPC: H03D3/16 ,  H04L27/14 ,  H04L27/148 ,  H03K9/00

Abstract: 1287799 Voice frequency receivers INTER. NATIONAL BUSINESS MACHINES CORP 13 Nov 1969 [16 Dec 1968] 55563/69 Heading H4R [Also in Division G4] In order to increase the response time of a high Q mechanically resonant tuned circuit in a VF receiver of a data transmission system, the input to the circuit is attenuated as soon as the output of the circuit reaches a predetermined threshold. By this means the guard interval required between VF data pulses is reduced since the decay period of the signal in the tuned circuit is considerably reduced relative to the decay period of a signal having unlimited amplitude. As shown, a signal at input 1 is applied via F.E.T. 2 to a piezo electric transducer 5 on one arm of a tuning fork 7. A similar transducer 9 on the fork's other arm is capacitively coupled via an amplifier 13 to a threshold detector 15 whose integrated and amplified output is applied to a flip-flop 23 and also to the gate of F.E.T. 2 so as to cut the latter off. The cessation of output signal on lead 20, 25 causes F.E.T. 2 to reconduct. The restoration of output signal again cuts off F.E.T. 2. This oscillation continues for the duration of the VF signal thus maintaining the amplitude of the signal in the tuned circuit at a desired level. When the VF signal ceases, the flip-flop is restored by the zero signal detector, rectifier-filter 27 and inverter 29. A plurality of such circuits may be connected in parallel for responding to a multifrequency input, e.g. one frequency from each of two sets of frequencies. With the latter arrangement the common input signal is initially subjected to AGC and a common zero signal detector is used for restoring all the flipflops. In an alternative arrangement the output of the flip-flop is used to operate the attenuator. In this case the output of the circuit falls continuously and does not oscillator about a predetermined level. The flip-flop however will still not alter its condition until the input signal ceases and circuit 27, 29 becomes effective.