公开(公告)号：DE3485816D1

公开(公告)日：1992-08-20

申请号：DE3485816

申请日：1984-11-23

Applicant: IBM

Inventor： FEINBERG IRVING ,  WU LEON LI-HENG ,  YUAN LEO

IPC: H01L21/822 ,  H01L21/8222 ,  H01L23/522 ,  H01L27/04 ,  H01L27/06 ,  H01L27/07 ,  H03K19/003 ,  H01L23/58 ,  H03K19/00

公开(公告)号：DE3577965D1

公开(公告)日：1990-06-28

申请号：DE3577965

申请日：1985-06-11

Applicant: IBM

Inventor： KRAUS CHARLES JOHN ,  STOLLER HERBERT IVAN ,  WU LEON LI-HENG

IPC: H05K3/46 ,  H01L23/538 ,  H05K1/00 ,  H05K1/11 ,  H01L23/52

Abstract: The wiring nets on a module are divided into two groups of planes, i.e., an upper group (5) in which wiring is placed along "north-south" and "east-west" directions and a lower group (6) in which wiring is placed along diagonal directions. All vias (R-vias) for connecting to the wiring pass through the upper group of planes but only half of the vias (D-vias) pass through the lower group of planes. Thus the spacing between the vias of the lower group of planes is greater than the spacing between the upper vias, allowing more lines per wiring channel in the lower group of planes.

公开(公告)号：DE3071907D1

公开(公告)日：1987-03-26

申请号：DE3071907

申请日：1980-11-10

Applicant: IBM

Inventor： FEINBERG IRVING ,  WU LEON LI-HENG

IPC: H01G4/12 ,  H01G2/00 ,  H01G4/005 ,  H01G4/30 ,  H01L27/01 ,  H01G1/147

Abstract: A decoupling capacitor for highly integrated, fast switching logic circuit modules. The capacitor comprises stacked ceramic sheets having metallized surfaces. The sheets are connected together in groups. Alternate groups are connected to a first electrode. Intervening alternate groups are connected to a second electrode. The connections are all made to the same ends of all the sheets so that the current flows in opposite directions through adjacent facing plates.

公开(公告)号：DE3776927D1

公开(公告)日：1992-04-09

申请号：DE3776927

申请日：1987-02-17

Applicant: IBM

Inventor： KRAUS CHARLES JOHN ,  STOLLER HERBERT IVAN ,  WU LEON LI-HENG

IPC: H01L23/538 ,  H01L25/00 ,  H01L25/04 ,  H01L25/18 ,  H05K1/02 ,  H05K1/14 ,  H05K3/34 ,  H05K3/36 ,  H01L23/52

Abstract: A multilayered interposer powering board (2) is disclosed for the distribution of required voltage levels to integrated circuit chip modules (1) under conditions of high current demand and heat induced expansions. The interposer board (2) is introduced between the module (1) and its module mounting board (12). Flexible connector fingers (8, 9) are intermetallically or ohmically connected between a given level of the interposer board and a given power level of the module.

公开(公告)号：DE2406808A1

公开(公告)日：1974-09-19

申请号：DE2406808

申请日：1974-02-13

Applicant: IBM

Inventor： WU LEON LI-HENG ,  VORA MADHUKAR BHAVANIDAS

IPC: B41M5/382 ,  B41J2/34 ,  G06K15/10 ,  H01L21/822 ,  H01L27/04 ,  H04N1/032 ,  H05B3/14 ,  B41J3/20