GRAPHIC DISPLAY SYSTEM
    2.
    发明专利

    公开(公告)号:DE3380712D1

    公开(公告)日:1989-11-16

    申请号:DE3380712

    申请日:1983-12-28

    Applicant: IBM

    Abstract: A graphic display system using a cathode ray tube (80) is disclosed, which displays M line segments (M is an integer greater than 1, not represented by any power of 2) for each raster scanning line in response to video data from a bit mapped refresh memory (130). Said refresh memory (130) is divided into memory blocks which are assigned sequential addresses and each store video dot data for one line segment. For each scanning line, N memory blocks, where N is an integer greater than M, represented by a predetermined power of 2 are addressed with M blocks addressed during the display time and (N-M) blocks addressed during the blanking period. The memory addressing rate is increased to complete the addressing of (N-M) blocks during the blanking time. Said refresh memory addressing avoids complex memory block address calculation and also permits horizontal scrolling by the selection of a display start address.

    GRAPHIC DISPLAY SYSTEM
    3.
    发明专利

    公开(公告)号:HK20490A

    公开(公告)日:1990-03-23

    申请号:HK20490

    申请日:1990-03-15

    Applicant: IBM

    Abstract: A graphic display system using a cathode ray tube (80) is disclosed, which displays M line segments (M is an integer greater than 1, not represented by any power of 2) for each raster scanning line in response to video data from a bit mapped refresh memory (130). Said refresh memory (130) is divided into memory blocks which are assigned sequential addresses and each store video dot data for one line segment. For each scanning line, N memory blocks, where N is an integer greater than M, represented by a predetermined power of 2 are addressed with M blocks addressed during the display time and (N-M) blocks addressed during the blanking period. The memory addressing rate is increased to complete the addressing of (N-M) blocks during the blanking time. Said refresh memory addressing avoids complex memory block address calculation and also permits horizontal scrolling by the selection of a display start address.

    GRAPHIC DISPLAY SYSTEM WITH DISPLAY LINE SCAN BASED OTHER THAN POWER OF 2 REFRESH MEMORY BASED ON THE POWER OF 2

    公开(公告)号:PH23858A

    公开(公告)日:1989-11-23

    申请号:PH29953

    申请日:1983-12-09

    Applicant: IBM

    Abstract: A graphic display system using a cathode ray tube (80) is disclosed, which displays M line segments (M is an integer greater than 1, not represented by any power of 2) for each raster scanning line in response to video data from a bit mapped refresh memory (130). Said refresh memory (130) is divided into memory blocks which are assigned sequential addresses and each store video dot data for one line segment. For each scanning line, N memory blocks, where N is an integer greater than M, represented by a predetermined power of 2 are addressed with M blocks addressed during the display time and (N-M) blocks addressed during the blanking period. The memory addressing rate is increased to complete the addressing of (N-M) blocks during the blanking time. Said refresh memory addressing avoids complex memory block address calculation and also permits horizontal scrolling by the selection of a display start address.

    5.
    发明专利
    未知

    公开(公告)号:BR8400757A

    公开(公告)日:1984-10-02

    申请号:BR8400757

    申请日:1984-02-20

    Applicant: IBM

    Abstract: A graphic display system using a cathode ray tube (80) is disclosed, which displays M line segments (M is an integer greater than 1, not represented by any power of 2) for each raster scanning line in response to video data from a bit mapped refresh memory (130). Said refresh memory (130) is divided into memory blocks which are assigned sequential addresses and each store video dot data for one line segment. For each scanning line, N memory blocks, where N is an integer greater than M, represented by a predetermined power of 2 are addressed with M blocks addressed during the display time and (N-M) blocks addressed during the blanking period. The memory addressing rate is increased to complete the addressing of (N-M) blocks during the blanking time. Said refresh memory addressing avoids complex memory block address calculation and also permits horizontal scrolling by the selection of a display start address.

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