公开(公告)号：CA2109682C

公开(公告)日：1998-11-03

申请号：CA2109682

申请日：1993-11-22

Applicant: IBM CANADA

Inventor： HARTLEY LEE F

IPC: G06F13/38 ,  G06F13/36 ,  G06F13/40

Abstract: A multiple bus interface is provided for connection to the bus of a data processing device. It includes a common interface adapted for connection to any one of several bus architectures for operation therewith. The interface adapter includes a control interface for accepting control signals from the bus of said data processing device, an address interface for accepting address signals from the data processing device, and a data interface for accepting data signals from said data processing device. A bus identifier is provided for identifying the bus architecture of the data processing device as will as a bus protocol decoder responsive to the bus identifer. The decoder derives its input from the control interface and is adapted to produce as an output standardized local control signals derived from the data processing bus control signals for sue by a local functional device to be accessed by the data processing device.

公开(公告)号：CA2103135A1

公开(公告)日：1995-05-16

申请号：CA2103135

申请日：1993-11-15

Applicant: IBM CANADA

Inventor： HARTLEY LEE F

IPC: H04L12/28 ,  H04L12/413 ,  H04L12/56

公开(公告)号：CA2311434A1

公开(公告)日：2001-12-13

申请号：CA2311434

申请日：2000-06-13

Applicant: IBM CANADA

Inventor： HARTLEY LEE F ,  FENG KAI D

IPC: H03F3/08 ,  H03K17/785 ,  H04B10/06 ,  H04B10/14

Abstract: A photoelectric receiver circuit provides a symmetrical sensor having a transimpedance amplifier on each side of the PIN diode, the outputs of the transimpedance amplifiers being AC coupled to a differential post amplifier. The differential structure provide s a very high common noise voltage rejection ratio and a virtual ground to the inverting inputs of the transimpedance amplifiers. In the preferred embodiment a differential PIN diode bias voltage is established by separate bias voltages respectively applied to the non-inverting input of each transimpedance amplifier. Thus, a low-noise voltage regulator can be used to supply power to the bias voltages in the invention, and the AC coupling capacitors can be very small to conserve space on the chip die. Auxiliary DC currents applied to both sides of the PIN diode maintain the PIN diode bias as high as possible and maximize the output swing ranges of the transimpedance amplifiers in order t o retain a wide bandwidth. The DC current sources allow the output bias voltages of the transimpedance amplifiers to be adjusted, and when controlled by the transimpedance amplifier outputs through a low pass filter, the output bias offset caused by ambient light can be eliminated. Th e feedback resistors may be variable resistors to provide automatic gain control.

公开(公告)号：CA2245113C

公开(公告)日：2001-05-01

申请号：CA2245113

申请日：1998-08-14

Applicant: IBM CANADA

Inventor： FENG KAI DI ,  HARTLEY LEE F

IPC: H03K17/22 ,  H01L23/58

Abstract: The invention provides a low-power selector circuit contained within an integrated circuit chip for selecting among a plurality of functions of the integrated circuit chip. The invention comprises a gated and pull-up resistor for connection to a power supply and connected to an input/output terminal pad of said integrated circuit chip; a sampling latch; a power-on reset circuit; said sampling latch being adapted on enablement by said power - on reset circuit to sample the voltage of the input/output terminal pad of said integrated circuit chip on power-up, to output a control signal to control functions of said integrated circuit chip, and in a predetermined situation to gate said pull-up resistor to an off state.

公开(公告)号：CA2109682A1

公开(公告)日：1995-05-23

申请号：CA2109682

申请日：1993-11-22

Applicant: IBM CANADA

Inventor： HARTLEY LEE F

IPC: G06F13/38 ,  G06F13/36 ,  G06F13/40

Abstract: A multiple bus interface is provided for connection to the bus of a data processing device. It includes a common interface adapted for connection to any one of several bus architectures for operation therewith. The interface adapter includes a control interface for accepting control signals from the bus of the data processing device, an address interface for accepting address signals from the data processing device, and a data interface for accepting data signals from the data processing device. A bus identifier is provided for identifying the bus architecture of the data processing device as will as a bus protocol decoder responsive to the bus identifer. The decoder derives its input from the control interface and is adapted to produce as an output standardized local control signals derived from the data processing bus control signals for sue by a local functional device to be accessed by the data processing device.

公开(公告)号：CA2311434C

公开(公告)日：2004-10-19

申请号：CA2311434

申请日：2000-06-13

Applicant: IBM CANADA

Inventor： FENG KAI D ,  HARTLEY LEE F

IPC: H03F3/08 ,  H03K17/785 ,  H04B10/06 ,  H04B10/14

Abstract: A photoelectric receiver circuit provides a symmetrical sensor having a transimpedance amplifier on each side of the PIN diode, the outputs of the transimpedance amplifiers being AC coupled to a differential post amplifier. The differential structure provide s a very high common noise voltage rejection ratio and a virtual ground to the inverting inputs of the transimpedance amplifiers. In the preferred embodiment a differential PIN diode bias voltage is established by separate bias voltages respectively applied to the non-inverting input of each transimpedance amplifier. Thus, a low-noise voltage regulator can be used to supply power to the bias voltages in the invention, and the AC coupling capacitors can be very small to conserve space on the chip die. Auxiliary DC currents applied to both sides of the PIN diode maintain the PIN diode bias as high as possible and maximize the output swing ranges of the transimpedance amplifiers in order t o retain a wide bandwidth. The DC current sources allow the output bias voltages of the transimpedance amplifiers to be adjusted, and when controlled by the transimpedance amplifier outputs through a low pass filter, the output bias offset caused by ambient light can be eliminated. Th e feedback resistors may be variable resistors to provide automatic gain control.

公开(公告)号：CA2245113A1

公开(公告)日：2000-02-14

申请号：CA2245113

申请日：1998-08-14

Applicant: IBM CANADA

Inventor： HARTLEY LEE F ,  FENG KAI DI

IPC: H03K17/22 ,  H01L23/58

Abstract: The invention provides a low-power selector circuit contained within an integrated circuit chip for selecting among a plurality of functions of the integrated circuit chip. The invention comprises a gated and pull-up resistor for connection to a power supply and connected to an input/output terminal pad of said integrated circuit chip; a sampling latch; a power-on reset circuit; said sampling latch being adapted on enablement by said poweron reset circuit to sample the voltage of the input/output terminal pad of said integrated circuit chip on power-up, to output a control signal to control functions of said integrated circuit chip, and in a predetermined situation to gate said pull-up resistor to an off state.

公开(公告)号：CA2166343A1

公开(公告)日：1997-06-30

申请号：CA2166343

申请日：1995-12-29

Applicant: IBM CANADA

Inventor： HARTLEY LEE F ,  MCKAY DANNY

IPC: H04L12/28 ,  H04L12/413 ,  H04L29/04

Abstract: A Carrier Sense Multiple Access with Automatic Abort collision avoidance (CSMA/AA) controller for application in a wireless local area network (LAN). The CSMA/AA controller reduces the number of invalid states arising from collision conditions on the communication channel. The controller features hardware logic control for time critical functions. The hardware logic circuit detects events and fault conditions under the CSMA reservation protocol which may otherwise be missed by the Medium Access Control software layer and aborts the transmit procedure. The off-loading of time critical functions also improves the performance of the system and reduces the variability arising from overhead execution times associated with the system CPU.