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公开(公告)号:DE3272696D1
公开(公告)日:1986-09-25
申请号:DE3272696
申请日:1982-05-24
Applicant: IBM DEUTSCHLAND , IBM
Inventor: HASSELMEIER HELMUT
Abstract: For the layout of a page, text and image blocks with data for positioning them on the page are supplied to the data processing system. The image blocks contain pattern information and the text blocks character codes. The pattern information for the characters is stored in a typefont buffer. For editing the data to be recorded, a so-called "window storage" (5) is provided, whose lines (W1-W7) are cyclically associated with successive dot pattern lines (P1, P2, P3 . . . ) on the page (4). For this purpose, the window storage (5), figuratively speaking, successively assumes different window positions (I, II, III) from top to bottom on the page. The height of the window storage (5) is chosen so that it is suitable for accommodating on the page a character with maximum ascender and descender heights. This ensures that the pattern information of a character is transferred to the window storage (5) at one go (in continuous periods). The edit sequence in the window storage (5) for pattern data of aligned or non-aligned lines of adjacent text blocks on the page depends on the sequence of the upper line boundaries and the baselines on the page, respectively.
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公开(公告)号:DE2715889A1
公开(公告)日:1978-10-19
申请号:DE2715889
申请日:1977-04-09
Applicant: IBM DEUTSCHLAND
Abstract: Control circuit for a print head of a metal paper printer in which electrodes are arranged on a slope, said electrodes being staggered in horizontal projection by the D-fold of their electrode width. The martrix-like structurized character to be printed consists of individual image elements stored in a main storage. This character information is read out column-by-column and written into predetermined locations of a read/write buffer storage. The write phase is followed by a readout phase of predetermined locations of the buffer storage for the direct addressing of the electrodes of the writing head. Write and read phases alternate. For determining the address of the storage locations during the write and read phases two counters are used in connection with a multiplier and an adder as well as a register for storing the D-value.
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公开(公告)号:DE2460147A1
公开(公告)日:1976-06-24
申请号:DE2460147
申请日:1974-12-19
Applicant: IBM DEUTSCHLAND
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