公开(公告)号：JPH02142355A

公开(公告)日：1990-05-31

申请号：JP29472788

申请日：1988-11-24

Applicant: IBM JAPAN

Inventor： KOBAYASHI MASAKI ,  MORI MASAKI ,  NAKANISHI HIDEAKI

IPC: H04N5/63 ,  H02M3/28 ,  H02M3/335 ,  H04N3/18

Abstract: PURPOSE:To prevent voltage stability from deteriorating by operating a switching regulator at a frequency N or 1/N times the frequency of a master switching regulator. CONSTITUTION:The power of a power source 10, after it is rectified and smoothed, is supplied to a master switching regulator(MSR) 13 and slave switching regulators(SSR) 14, 15A, and 15B. For switching, the regulator MSR 13 oscillates at 130kHz when a display control circuit 6 is turned off; it oscillates at 126kHz being four times the horizontal deflection synchronous frequency of a horizontal and vertical deflection control circuit 7 when the display control circuit 6 is turned on. The regulators SSR 15A, 15B oscillate at frequencies 1/4 and 1/2 times that of the MSR 13 respectively for switching. By oscillating all the SSRs synchronized with the MSR 13, a beat phenomenon is prevented from being generated.