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1.发明申请METHOD FOR A-D CONVERTING ANALOGUE SIGNALS AND CORRESPONDING A-D CONVERTER ARRANGEMENT 审中-公开方法A / D将模拟信号转换和适当的A / D转换器布置
公开(公告)号：WO0110031A3
公开(公告)日：2002-09-19
申请号：PCT/DE0002566
申请日：2000-08-02
Applicant: INFINEON TECHNOLOGIES AG , BARRENSCHEEN JENS , FENZL GUNTHER , KOENIG DIETMAR
Inventor： BARRENSCHEEN JENS , FENZL GUNTHER , KOENIG DIETMAR
CPC classification number: H03M1/1225
Abstract: The invention relates to an A-D converter arrangement comprising an A/D converter (6). The analogue signals of several signal channels (2) can be transmitted to the converter for A-D converting. Converting parameters of the A-D converter (6) or other operational parameters of the A-D converter arrangement are channel-specifically adjusted by means of a corresponding control device and according to the respective signal channel (2) to be converted. The operational parameters can be determined functions resulting in an accomplished A-D converting process.
Abstract translation: 一个A / D转换器系统，包括一个A / D转换器（6），其中对于多个信号通道（2）的所述模拟信号的A / D转换可以被供给。 与合适的控制装置的帮助下是A / D转换器（6）的换能器的参数或在A / D转换器系统的其它操作参数，如特定的功能，响应于操作执行A / D转换，在分别被转换信号信道的依赖 （2）调整特定频道。
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公开(公告)号：WO0022734A3
公开(公告)日：2000-07-20
申请号：PCT/DE9903320
申请日：1999-10-15
Applicant: INFINEON TECHNOLOGIES AG , BARRENSCHEEN JENS , FENZL GUNTHER , ROHM PETER , KOENIG DIETMAR , EIKEMEIER DIRK
Inventor： BARRENSCHEEN JENS , FENZL GUNTHER , ROHM PETER , KOENIG DIETMAR , EIKEMEIER DIRK
Abstract: The invention relates to an A/D converter which is characterized in that it configured to signal the start or the impending start of an A/D conversion and/or to request for another A/D converter to carry out an A/D conversion. It is thus possible for a plurality of A/D converters to operate in an absolutely time synchronous manner with minimal effort.
Abstract translation: 所描述的A / D转换器的特征在于，它被设计成用信号的开头或一个A / D转换和/或从另一个A / D转换器的即将开始执行A / D- 请求转换。 这使得可以以最小的努力来运行多个A / D转换器的工作完全同步。
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公开(公告)号：DE102006061050A1
公开(公告)日：2008-06-26
申请号：DE102006061050
申请日：2006-12-22
Applicant: INFINEON TECHNOLOGIES AG
Inventor： SYDOW CARSTEN , FENZL GUNTHER
Abstract: The data processing device comprises two components, which are coupled with one another. The former component is operated in an endian mode, while the latter component is operated in another endian mode, which differs from the former endian mode. The two components are formed to generate a control signal (AC) which contains access characteristic information. The access characteristic information comprises an endian-mode-information, an access-type-information and data capacity information. Conversion devices (20,22) are provided for permutation of bytes in a data item.
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公开(公告)号：DE102004061310B4
公开(公告)日：2007-08-30
申请号：DE102004061310
申请日：2004-12-20
Applicant: INFINEON TECHNOLOGIES AG
Inventor： FENZL GUNTHER , KRAUS JOCHEN , EDER STEFAN
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公开(公告)号：DE59911805D1
公开(公告)日：2005-04-28
申请号：DE59911805
申请日：1999-05-06
Applicant: INFINEON TECHNOLOGIES AG
Inventor： BARRENSCHEEN JENS , FENZL GUNTHER
Abstract: A method for A/D conversion of analog signals using an A/D converter, and to an appropriate A/D converter circuit. In order to process converter request signals from different converter request sources requesting analog signals for conversion, the invention proposes assigning definable, selectable priorities to the different converter request sources. If there is a request for A/D conversion from a converter request source, the system establishes which of the converter request sources requesting A/D conversion has the highest priority. An analog signal from this selected converter request source is then supplied to the A/D converter.
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Patent Agency Ranking
公开(公告)号：GB2391138B
公开(公告)日：2004-09-15
申请号：GB0315564
申请日：2003-07-03
Applicant: INFINEON TECHNOLOGIES AG
Inventor： FENZL GUNTHER , EDER STEFAN
Abstract: A method and device for the uniform output of asynchronously transmitted digital values is provided, including: receiving the digital values in a receiver from a transmission path; outputting the digital values from the receiver on the basis of an output clock for further processing; transmitting the digital values to the transmission path by a transmission device of the receiver, determining the amount of the digital values received by the receiver in relation to the time; adjusting the output clock on the basis of the determined amount in such a way that the digital values are outputted at the frequency with which on time average the receiver receives the digital values; and adjusting a transmission clock of the transmission device to correspond to the output clock of the receiver.
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公开(公告)号：DE19936329B4
公开(公告)日：2008-03-27
申请号：DE19936329
申请日：1999-08-02
Applicant: INFINEON TECHNOLOGIES AG
Inventor： BARRENSCHEEN JENS , FENZL GUNTHER , KOENIG DIETMAR
IPC: H03M1/12
Abstract: An A/D converter arrangement comprises an A/D converter (6) to which analog signals from a plurality of signal channels (2) can be fed for A/D conversion. With the help of an appropriate control means (8), converter parameters of the A/D converter (6) or even other operating parameters of the A/D converter arrangement, such as certain functions performed in response to an A/D conversion which has been carried out for example, are set in a channel-specific way as a function of the signal channel (2) which is to be converted at the time.
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公开(公告)号：DE10232988B4
公开(公告)日：2007-11-22
申请号：DE10232988
申请日：2002-07-19
Applicant: INFINEON TECHNOLOGIES AG
Inventor： EDER STEFAN , FENZL GUNTHER
Abstract: A method and device for the uniform output of asynchronously transmitted digital values is provided, including: receiving the digital values in a receiver from a transmission path; outputting the digital values from the receiver on the basis of an output clock for further processing; transmitting the digital values to the transmission path by a transmission device of the receiver, determining the amount of the digital values received by the receiver in relation to the time; adjusting the output clock on the basis of the determined amount in such a way that the digital values are outputted at the frequency with which on time average the receiver receives the digital values; and adjusting a transmission clock of the transmission device to correspond to the output clock of the receiver.
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公开(公告)号：DE102004061310A1
公开(公告)日：2006-06-29
申请号：DE102004061310
申请日：2004-12-20
Applicant: INFINEON TECHNOLOGIES AG
Inventor： FENZL GUNTHER , KRAUS JOCHEN , EDER STEFAN
Abstract: The system (1) contains functional system units with dynamic monitoring and regulation of the power consumption of the system units, at least one voltage supply unit (2) for generating a system supply voltage, at least one clock generating unit (3), several clocked system units (4-1,..), each with at least one clock adaptation unit, a controllable supply voltage adaptation unit and an activity monitoring unit for generating operating state signals, an operating state monitoring unit (9) for evaluating operating state signals and providing operating state information of the embedded system and a power consumption control unit (10) for controlling the clock adaptation units and the supply voltage adaptation units depending on the operating state information for dynamic regulation of the power consumption of the individual system units, whereby the power consumption is regulated continuously. An independent claim is also included for a DMA controller.
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公开(公告)号：FR2842678B1
公开(公告)日：2005-12-16
申请号：FR0350349
申请日：2003-07-18
Applicant: INFINEON TECHNOLOGIES AG
Inventor： FENZL GUNTHER , EDER STEFAN
Abstract: A method and device for the uniform output of asynchronously transmitted digital values is provided, including: receiving the digital values in a receiver from a transmission path; outputting the digital values from the receiver on the basis of an output clock for further processing; transmitting the digital values to the transmission path by a transmission device of the receiver, determining the amount of the digital values received by the receiver in relation to the time; adjusting the output clock on the basis of the determined amount in such a way that the digital values are outputted at the frequency with which on time average the receiver receives the digital values; and adjusting a transmission clock of the transmission device to correspond to the output clock of the receiver.
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