Abstract:
PROBLEM TO BE SOLVED: To reduce the overhead associated with switching the context of an address space. SOLUTION: This method includes: a step of switching the context between the first address space and the second address space by the processor of a system; a step of determining whether the second address space exists in a list of address spaces stored in a scratch pad memory of the processor; a step of allocating a new entry of the second address space that is different from the current entry of the first address space after switching the context to the second address space if the second address space does not exist in the list of address spaces; and a step of maintaining the current entry of the first address space to a conversion buffer of the processor after switching the context to the second address space if the second address space exists in the list of address space. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To reduce the number of flushes of pipeline resources on context switches and effectively maintain the pipeline resources, in consideration that context switches in a VM or other environment needs flushes of TLBs and the pipeline resources, and overhead can adversely impact performance, especially in systems with many active contexts.SOLUTION: The method includes steps of: determining whether a predetermined command changes a selected value or not; performing operations with the processor resources if the selected value is not changed; and flushing all entries in all address spaces of the processor resources if the selected value has been changed.
Abstract:
PROBLEM TO BE SOLVED: To more efficiently maintain pipeline resources on context switches.SOLUTION: In one embodiment of the present invention, a method includes switching between guest software and a virtual machine monitor, determining if the switch is caused by storage into a protected location, and selectively flushing at least one entry of processor resources corresponding to the protected location while maintaining other entries of processor resources corresponding to the guest software.
Abstract:
PROBLEM TO BE SOLVED: To reduce flush of a TLB (Translation Lookaside Buffer) and another pipeline to be the cause of generating overhead in a context switch in a virtual machine (VM) environment or another environment. SOLUTION: Switching is made between guest software and a virtual machine monitor, whether storage in a protected location causes the switching is determined, and at least one entry of processor resources corresponding to the protected location is selectively flushed while maintaining another entry of processor resources corresponding to the guest software. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To further effectively maintain pipeline resources by switching contexts.SOLUTION: According to a first embodiment of this invention, switching is made between guest software and a virtual machine monitor, whether storage in a protected location causes the switching is determined, and at least one entry of processor resources corresponding to the protected location is selectively flushed while maintaining another entry of processor resources corresponding to the guest software.
Abstract:
PROBLEM TO BE SOLVED: To reduce overhead associated with switching the context of an address space. SOLUTION: A processor includes: a control register which stores an address based on a page directory corresponding to the address space; a conversion look-aside buffer which includes an entry containing a field of an address space identifier; and an execution logic which executes an "MOV to control register" command in order to switch between the address spaces without flashing the conversion look-aside buffer. COPYRIGHT: (C)2011,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a method for generating a persistent user-level thread. SOLUTION: Embodiments of the invention provide a method of creating, based on an operating-system (OS)-scheduled thread running on an OS-visible sequencer and using an instruction set extension, a persistent user-level thread to run on an OS-sequestered sequencer independently of context switch activities on the OS-scheduled thread. The OS-scheduled thread and the persistent user-level thread may share a common virtual address space. Embodiments of the invention may also provide a method of causing a service thread running on an additional OS-visible sequencer to provide OS services to the persistent user-level thread. Embodiments of the invention may further provide apparatus, system, and machine-readable medium thereof. COPYRIGHT: (C)2007,JPO&INPIT
Abstract:
Disclosed are embodiments of a system, methods and mechanism for management and translation of mapping between logical sequencer addresses and physical or logical sequencers in a multi-sequencer multithreading system. A mapping manager may manage assignment and mapping of logical sequencer addresses or pages to actual sequencers or frames of the system. Rationing logic associated with the mapping manager may take into account sequencer attributes when such mapping is performed Relocation logic associated with the mapping manager may manage spill and fill of context information to/from a backing store when re-mapping actual sequencers. Sequencers may be allocated singly, or may be allocated as part of partitioned blocks. The mapping manager may also include translation logic that provides an identifier for the mapped sequencer each time a logical sequencer address is used in a user program. Other embodiments are also described and claimed.
Abstract:
In one embodiment, a method induces receiving a request to transition control to a virtual machine (VM) from a virtual machine monitor (VMM), determining that a single-stepping indicator is set to a single stepping value, and transitioning control to the VM. Further, if an execution of a first instruction in the VM completes successfully, control is transitioned to the VMM following the successful completion of the execution of the first instruction.
Abstract:
In one embodiment, information pertaining to a first fault occurring during operation of a virtual machine (VM) is stored in a first field. A second fault is detected while delivering the first fault to the VM, and a determination is made as to whether the second fault is associated with a transition of control to a virtual machine monitor (VMM). If this determination is positive, information pertaining to the second fault is stored in a second field, and control is transitioned to the VMM.