公开(公告)号：WO2013006565A3

公开(公告)日：2013-02-21

申请号：PCT/US2012045285

申请日：2012-07-02

Applicant: INTEL CORP ,  OAWAMI SHEKOUFEH ,  FABER ROBERT W

Inventor： OAWAMI SHEKOUFEH ,  FABER ROBERT W

IPC: G06F13/00 ,  G06F13/14 ,  G11C13/02

CPC classification number: G06F3/0611 ,  G06F3/0632 ,  G06F3/0679

Abstract: Techniques for determining an identifier for a volume of memory in a memory device of a computer system. In an embodiment, the memory device detects an indication of an initialization event of the computer system and receives command information after the detecting of the indication. In certain embodiments, the memory device stores an identifier value for association with the volume of memory, wherein the storing is based on whether the received command information specifies that the volume of memory is to be assigned an identifier.

Abstract translation: 用于确定计算机系统的存储器设备中的存储器容量的标识符的技术。 在一个实施例中，存储器装置检测计算机系统的初始化事件的指示，并且在检测到指示之后接收命令信息。 在某些实施例中，存储器设备存储用于与存储器卷相关联的标识符值，其中存储基于所接收的命令信息是否指定要为存储器卷分配标识符。

公开(公告)号：HK1043683A1

公开(公告)日：2002-09-20

申请号：HK02105398

申请日：2002-07-22

Applicant: INTEL CORP

Inventor： GRAUNKE GARY L ,  LEE DAVID A ,  FABER ROBERT W

IPC: H04L9/08 ,  H04L9/20 ,  H04L9/32 ,  H04N7/167 ,  H04N21/41 ,  H04N21/418 ,  H04N21/4627 ,  H04N21/6334 ,  H04N21/6377 ,  H04N

Abstract: A video source device generates a session key for each transmission session wherein a multi-frame video content is to be transmitted to a video sink device. The video source device uses the session key to generate a successive number of frame keys. The frame keys in turn are used to generate corresponding pseudo random bit sequences for ciphering the corresponding frames to protect the video content from unauthorized copying during transmission. The video sink device practices a complementary approach to decipher the received video content. In one embodiment, both devices are each provided with an integrated block/stream cipher to practice the transmission protection method.

公开(公告)号：DE60035514D1

公开(公告)日：2007-08-23

申请号：DE60035514

申请日：2000-08-18

Applicant: INTEL CORP

Inventor： GRAUNKE GARY L ,  LEE DAVID A ,  FABER ROBERT W ,  TRAW BRENDAN S

IPC: G06F21/00 ,  H04L9/08 ,  H04L9/20 ,  H04L9/32 ,  H04N7/167 ,  H04N21/258 ,  H04N21/41 ,  H04N21/4143 ,  H04N21/4367 ,  H04N21/4627 ,  H04N21/6334

Abstract: An encoding apparatus, comprises: a block cipher key section to be initialized with a block cipher key, having transformation units to transform the block cipher key into a transformed block cipher key; a data section coupled with the block cipher key section to be initialized with a random number, having transformation units to transform the random number based on the transformed block cipher key; a stream cipher key section coupled with the block cipher key section to modify the block cipher key according to a stream cipher key to produce data bits to dynamically modify the random number into a modified random number in the data block section, wherein the stream cipher key section further includes linear feedback shift registers (LFSRs) to generate a first, second, and third sequence of data bits, and a serial network of shuffle units to shuffle the third sequence of data bits using the first sequence of data bits and input bits and the second sequence of data bits and control bits to the serial network of shuffle units; and a mapping section to receive the modified random number and the transformed block cipher key and generate a pseudo random bit sequence based on the modified random number and the transformed block cipher key.

公开(公告)号：HK1043897A1

公开(公告)日：2002-09-27

申请号：HK02105427

申请日：2002-07-23

Applicant: INTEL CORP

Inventor： GRAUNKE GARY L ,  LEE DAVID A ,  FABER ROBERT W ,  TRAW BRENDAN S

IPC: G06F21/00 ,  H04L9/08 ,  H04L9/20 ,  H04L9/32 ,  H04N7/167 ,  H04N21/258 ,  H04N21/41 ,  H04N21/4143 ,  H04N21/4367 ,  H04N21/4627 ,  H04N21/6334

Abstract: An encoding apparatus, comprises: a block cipher key section to be initialized with a block cipher key, having transformation units to transform the block cipher key into a transformed block cipher key; a data section coupled with the block cipher key section to be initialized with a random number, having transformation units to transform the random number based on the transformed block cipher key; a stream cipher key section coupled with the block cipher key section to modify the block cipher key according to a stream cipher key to produce data bits to dynamically modify the random number into a modified random number in the data block section, wherein the stream cipher key section further includes linear feedback shift registers (LFSRs) to generate a first, second, and third sequence of data bits, and a serial network of shuffle units to shuffle the third sequence of data bits using the first sequence of data bits and input bits and the second sequence of data bits and control bits to the serial network of shuffle units; and a mapping section to receive the modified random number and the transformed block cipher key and generate a pseudo random bit sequence based on the modified random number and the transformed block cipher key.

公开(公告)号：MY137842A

公开(公告)日：2009-03-31

申请号：MYPI20050797

申请日：2005-02-26

Applicant: INTEL CORP

Inventor： ROYER ROBERT J JR ,  FABER ROBERT W ,  GARNEY JOHN I

IPC: G06F3/06 ,  G06F12/00 ,  G06F12/08 ,  G06F13/00 ,  G11C11/22

Abstract: A HOST CONTROLLER INTERFACE (18) TO MANAGE THE COMPLEXITY OF ACCESSING MASS STORAGE (20, 22, ..., 24 & 26) THAT TAKES INTO ACCOUNT THE SPECIAL HANDLING NEEDS OF VARIOUS MEMORY TECHNOLOGIES SUCH AS POLYMER MEMORIES.

公开(公告)号：AU7330700A

公开(公告)日：2001-03-26

申请号：AU7330700

申请日：2000-08-18

Applicant: INTEL CORP

Inventor： GRAUNKE GARY L ,  LEE DAVID A ,  FABER ROBERT W ,  TRAW BRENDAN S

IPC: G06F21/00 ,  H04L9/08 ,  H04L9/20 ,  H04L9/32 ,  H04N7/167 ,  H04N21/258 ,  H04N21/41 ,  H04N21/4143 ,  H04N21/4367 ,  H04N21/4627 ,  H04N21/6334

Abstract: An encoding apparatus, comprises: a block cipher key section to be initialized with a block cipher key, having transformation units to transform the block cipher key into a transformed block cipher key; a data section coupled with the block cipher key section to be initialized with a random number, having transformation units to transform the random number based on the transformed block cipher key; a stream cipher key section coupled with the block cipher key section to modify the block cipher key according to a stream cipher key to produce data bits to dynamically modify the random number into a modified random number in the data block section, wherein the stream cipher key section further includes linear feedback shift registers (LFSRs) to generate a first, second, and third sequence of data bits, and a serial network of shuffle units to shuffle the third sequence of data bits using the first sequence of data bits and input bits and the second sequence of data bits and control bits to the serial network of shuffle units; and a mapping section to receive the modified random number and the transformed block cipher key and generate a pseudo random bit sequence based on the modified random number and the transformed block cipher key.

公开(公告)号：AU6918400A

公开(公告)日：2001-03-26

申请号：AU6918400

申请日：2000-08-17

Applicant: INTEL CORP

Inventor： GRAUNKE GARY L ,  LEE DAVID A ,  FABER ROBERT W

IPC: H04L9/08 ,  H04L9/20 ,  H04L9/32 ,  H04N7/167 ,  H04N21/41 ,  H04N21/418 ,  H04N21/4627 ,  H04N21/6334 ,  H04N21/6377

Abstract: A video source device generates a session key for each transmission session wherein a multi-frame video content is to be transmitted to a video sink device. The video source device uses the session key to generate a successive number of frame keys. The frame keys in turn are used to generate corresponding pseudo random bit sequences for ciphering the corresponding frames to protect the video content from unauthorized copying during transmission. The video sink device practices a complementary approach to decipher the received video content. In one embodiment, both devices are each provided with an integrated block/stream cipher to practice the transmission protection method.

公开(公告)号：EP3050062A4

公开(公告)日：2017-05-24

申请号：EP14847332

申请日：2014-08-26

Applicant: INTEL CORP

Inventor： PANGAL KIRAN ,  RAMANUJAN RAJ K ,  FABER ROBERT W ,  SUNDARAM RAJESH

IPC: G11C13/00

CPC classification number: G11C13/0033 ,  G11C13/0004 ,  G11C2013/0076

公开(公告)号：EP2761467A4

公开(公告)日：2015-03-11

申请号：EP11873232

申请日：2011-09-30

Applicant: INTEL CORP

Inventor： FABER ROBERT W

IPC: G06F12/00 ,  G06F12/02 ,  G06F12/08 ,  G06F13/14 ,  G11C7/00 ,  G11C11/56

CPC classification number: G06F12/0238 ,  G06F12/0868 ,  G06F13/1668 ,  G06F2212/202 ,  Y02D10/13 ,  Y02D10/14

Abstract: A method is described that entails receiving an address for a read or write transaction to a non volatile system memory device. The method further involves determining a usage statistic of the memory device for a set of addresses of which the address is a member. The method further involves determining a characteristic of a signal to be applied to the memory device for the read or write transaction based on the usage statistic. The method further involves generating a signal having the characteristic to perform the read or write transaction.

公开(公告)号：EP2726993A4

公开(公告)日：2015-03-18

申请号：EP12808103

申请日：2012-07-02

Applicant: INTEL CORP

Inventor： OAWAMI SHEKOUFEH ,  FABER ROBERT W

IPC: G06F13/00 ,  G06F13/14 ,  G06F13/42 ,  G11C13/02

CPC classification number: G06F3/0611 ,  G06F3/0632 ,  G06F3/0679

Abstract: Techniques for determining an identifier for a volume of memory in a memory device of a computer system. In an embodiment, the memory device detects an indication of an initialization event of the computer system and receives command information after the detecting of the indication. In certain embodiments, the memory device stores an identifier value for association with the volume of memory, wherein the storing is based on whether the received command information specifies that the volume of memory is to be assigned an identifier.