公开(公告)号：WO2017030619A3

公开(公告)日：2017-04-13

申请号：PCT/US2016034468

申请日：2016-05-26

Applicant: INTEL CORP

Inventor： SUN MINGQIU ,  POORNACHANDRAN RAJESH ,  ZIMMER VINCENT J ,  SMITH NED M ,  SELVARAJE GOPINATTH

IPC: G06F21/54 ,  G06F21/53 ,  G06F21/56

CPC classification number: G06F8/41 ,  G06F21/00 ,  G06F21/57

Abstract: Various embodiments are generally directed to techniques for supporting the distributed execution of a task routine among multiple secure controllers incorporated into multiple computing devices. An apparatus includes a first processor component and first secure controller of a first computing device, where the first secure controller includes: a selection component to select the first secure controller or a second secure controller of a second computing device to compile a task routine based on a comparison of required resources to compile the task routine and available resources of the first secure controller; and a compiling component to compile the task routine into a first version of compiled routine for execution within the first secure controller by the first processor component and a second version for execution within the second secure controller by a second processor component in response to selection of the first secure controller. Other embodiments are described and claimed.

Abstract translation: 各种实施例通常涉及用于支持并入多个计算设备的多个安全控制器之中的任务例程的分布式执行的技术。 一种装置包括第一计算设备的第一处理器组件和第一安全控制器，其中第一安全控制器包括：选择组件，用于选择第二计算设备的第一安全控制器或第二安全控制器，以基于 比较所需的资源来编译任务例程和第一个安全控制器的可用资源; 以及编译组件，用于将所述任务例程编译成由所述第一处理器组件在所述第一安全控制器内执行的编译例程的第一版本，以及响应于所述第二处理器组件的选择而由所述第二处理器组件在所述第二安全控制器内执行的第二版本 第一个安全控制器。 描述和要求保护其他实施例。

公开(公告)号：DE102018207314A1

公开(公告)日：2018-11-15

申请号：DE102018207314

申请日：2018-05-09

Applicant: INTEL CORP

Inventor： ABELS TIM ,  SUN MINGQIU ,  IRELAN PEGGY ,  POORNACHANDRAN RAJESH ,  SELVARAJE GOPINATTH ,  ZIMMER VINCENT

IPC: G06F21/10 ,  G06F9/44 ,  G06F21/60

Abstract: Es wird eine Mikrodienst-Infrastruktur bereitgestellt, die die Aktualität von Rechenplattform-Mikrodiensten, die in einer prozessbasierten virtuellen Maschine implementiert sind, sicher aufrechterhält. Die durch die Infrastruktur gepflegten Rechenplattform-Mikrodienste können geschützte Methoden beinhalten, die den Zugang zu Komponenten der zugrunde liegenden Rechenumgebung bereitstellen und steuern. Diese Komponenten können beispielsweise Speichergeräte, Peripheriegeräte und Netzwerkschnittstellen beinhalten. Durch Bereitstellung eines Software-definierten Microservice-Layers zwischen diesen Hardware-Komponenten und Workflows, die eine störsichere Anwendungslogik spezifizieren, weisen die hier offenbarten Ausführungsformen eine im Vergleich zur herkömmlichen Technologie verbesserte Flexibilität und Skalierbarkeit auf.

公开(公告)号：EP3191939A4

公开(公告)日：2018-04-25

申请号：EP14901679

申请日：2014-09-10

Applicant: INTEL CORP

Inventor： SHI LEI LUC ,  WANG XIN ,  SUN MINGQIU ,  WANG LIGANG ,  SELVARAJE GOPINATTH

IPC: G06F9/44 ,  G06F8/36 ,  G06F8/41 ,  G06F8/61 ,  G06F9/445

CPC classification number: G06F8/36 ,  G06F8/31 ,  G06F8/315 ,  G06F8/427 ,  G06F8/63 ,  G06F9/44521

Abstract: Apparatuses, methods and storage media associated with generating a custom class library are disclosed herein. In embodiments, an apparatus may include an analyzer configured to receive a workload for a device and a class library used by the workload, analyze the workload and class library, identify one or more workload full API call chains, and generate information about the one or more workload full API call chains. Further, the apparatus may include a generator to generate from the class library, a custom class library for the workload that is smaller than the class library, based at least in part on the one or more workload full API call chains. Other embodiments may be disclosed or claimed.

公开(公告)号：EP3198509A4

公开(公告)日：2018-05-16

申请号：EP15844129

申请日：2015-08-19

Applicant: INTEL CORP

Inventor： POORNACHANDRAN RAJESH ,  ZIMMER VINCENT J ,  SHAHIDZADEH SHAHROK ,  SELVARAJE GOPINATTH

IPC: G06F21/57 ,  G06F21/73 ,  G06F21/74

CPC classification number: G06F21/73 ,  G06F21/55 ,  G06F21/575 ,  G06F21/74

Abstract: Technologies for verifying hardware components of a computing device include retrieving platform identification data of the computing device, wherein the platform identification data is indicative of one or more reference hardware components of the computing device, accessing hardware component identification data from one or more dual-headed identification devices of the computing device, and comparing the platform identification data to the hardware component identification data to determine whether a hardware component of the computing device has been modified. Each of the one or more dual-headed identification devices is secured to a corresponding hardware component of the computing device, includes identification data indicative of an identity of the corresponding hardware component of the computing device, and is capable of wired and wireless communication.

公开(公告)号：EP3192003A4

公开(公告)日：2018-05-16

申请号：EP15839311

申请日：2015-07-28

Applicant: INTEL CORP

Inventor： ZIMMER VINCENT J ,  BARRY PETER J ,  POORNACHANDRAN RAJESH ,  VAN DE VEN ARJAN ,  DICE PETER A ,  SELVARAJE GOPINATTH ,  CARREÑO JULIEN ,  ROSENBAUM LEE G

IPC: G06F21/57 ,  G06F9/4401 ,  G06F21/53 ,  G06F21/72 ,  G06F21/79 ,  H04L9/08 ,  H04L9/14 ,  H04L9/30

CPC classification number: G06F21/575 ,  G06F9/4406 ,  G06F21/53 ,  G06F21/72 ,  G06F21/79 ,  G06F2221/033 ,  G06F2221/2107 ,  G06F2221/2111 ,  H04L9/0861 ,  H04L9/0894 ,  H04L9/14 ,  H04L9/302 ,  H04L2209/60

Abstract: In an embodiment, a system on a chip includes: a single core to execute a legacy instruction set, the single core configured to enter a system management mode (SMM) to provide a trusted execution environment to perform at least one secure operation; and a memory controller coupled to the single core, the memory controller to interface with a system memory, where a portion of the system memory comprises a secure memory for the SMM, and the single core is to authenticate and execute a boot firmware, and pass control to the SMM to obtain a key pair from a protected storage and store the key pair in the secure memory. Other embodiments are described and claimed.

公开(公告)号：EP3063621A4

公开(公告)日：2017-07-12

申请号：EP13896605

申请日：2013-10-29

Applicant: INTEL CORP

Inventor： ZIMMER VINCENT J ,  ANVIN H P ,  ROTHMAN MICHAEL A ,  ESTRADA DAVID C ,  YOKE NICHOLAS J ,  SELVARAJE GOPINATTH

IPC: G06F9/24 ,  G06F9/44

CPC classification number: G06F9/4401 ,  G06F9/4403 ,  G06F9/441

Abstract: The present disclosure is directed to flexible bootstrap code architecture. A device may comprise equipment for operating the device and an operating system (OS) for operating the equipment. A boot module may also be included in the device to execute boot operations. At least one flexible boot (FB) module in the boot module may interact with the equipment and/or OS during the boot operations to cause the boot operations to become device-specific. An example boot module may comprise a plurality of FB modules. An example FB module may verify a device/chipset identification and may control the boot operations based on the identification. Other example FB modules may select resources to load based on an OS type, may provide a boot configuration table location for use in OS runtime boot configuration or may load variables from a preload variable directory for use in configuring boot operations.

Abstract translation: 本公开涉及灵活的引导代码体系结构。 设备可以包括用于操作设备的设备和用于操作设备的操作系统（OS）。 引导模块也可以包含在设备中以执行引导操作。 引导模块中的至少一个弹性引导（FB）模块可以在引导操作期间与设备和/或OS交互以使引导操作变为设备特定的。 示例引导模块可以包括多个FB模块。 示例性FB模块可以验证设备/芯片组标识并且可以基于标识来控制引导操作。 其他示例FB模块可以基于OS类型选择要加载的资源，可以提供用于OS运行时引导配置的引导配置表位置，或者可以从预加载变量目录加载变量以用于配置引导操作。