公开(公告)号：US09640880B2

公开(公告)日：2017-05-02

申请号：US14651820

申请日：2014-07-01

Applicant: Intel Corporation

Inventor： Donald T. Tran ,  Jeffrey Lee ,  Gaurav Chawla

IPC: H01R12/53 ,  H01R9/03 ,  H01R13/6592 ,  H01R13/6593 ,  H01R13/6594

CPC classification number: H01R12/53 ,  H01R9/035 ,  H01R9/038 ,  H01R13/6592 ,  H01R13/6593 ,  H01R13/6594

Abstract: A cable connector that includes a substrate having a plurality of conductive pads and at least one grounding pad. The cable connector further includes twin axial cable that includes a first conductor and second conductor, a first insulator that surrounds the first conductor, and a second insulator that surrounds the second conductor. The twin axial cable further includes a ground shield that surrounds the first and second insulator. The first conductor is electrically connected to one conductive pad and the second conductor is electrically connected to another of the conductive pads. The ground shield is electrically connected to the grounding pad. A shielding structure is mounted to the substrate and is electrically connected to the grounding pad. The shielding structure includes a cap and a plurality of sidewalls extending from the cap to the substrate. The twin axial cable is positioned between the side walls.

公开(公告)号：US20160276759A1

公开(公告)日：2016-09-22

申请号：US14651820

申请日：2014-07-01

Applicant: INTEL CORPORATION

Inventor： Donald T. Tran ,  Jeffrey Lee ,  Gaurav Chawla

IPC: H01R12/53 ,  H01R13/6594 ,  H01R13/6592 ,  H01R13/6593

CPC classification number: H01R12/53 ,  H01R9/035 ,  H01R9/038 ,  H01R13/6592 ,  H01R13/6593 ,  H01R13/6594

Abstract: A cable connector that includes a substrate having a plurality of conductive pads and at least one grounding pad. The cable connector further includes twin axial cable that includes a first conductor and second conductor, a first insulator that surrounds the first conductor, and a second insulator that surrounds the second conductor. The twin axial cable further includes a ground shield that surrounds the first and second insulator. The first conductor is electrically connected to one conductive pad and the second conductor is electrically connected to another of the conductive pads. The ground shield is electrically connected to the grounding pad. A shielding structure is mounted to the substrate and is electrically connected to the grounding pad. The shielding structure includes a cap and a plurality of sidewalls extending from the cap to the substrate. The twin axial cable is positioned between the side walls.

Abstract translation: 一种电缆连接器，包括具有多个导电焊盘和至少一个接地焊盘的衬底。 电缆连接器还包括双轴向电缆，其包括第一导体和第二导体，围绕第一导体的第一绝缘体和围绕第二导体的第二绝缘体。 双轴向电缆还包括围绕第一和第二绝缘体的接地屏蔽。 第一导体电连接到一个导电焊盘，并且第二导体电连接到另一个导电焊盘。 接地屏蔽电气连接到接地垫。 屏蔽结构安装在基板上并电连接到接地垫。 屏蔽结构包括盖和从盖到基板延伸的多个侧壁。 双轴向电缆位于侧壁之间。

公开(公告)号：US11516915B2

公开(公告)日：2022-11-29

申请号：US16559286

申请日：2019-09-03

Applicant: Intel Corporation

Inventor： Zhichao Zhang ,  Tao Wu ,  Gaurav Chawla ,  Jeffrey Lee

IPC: H05K1/11 ,  H05K3/40 ,  H05K3/46 ,  H05K3/34 ,  H05K1/02

Abstract: A land grid array (LGA) land pad having reduced capacitance is disclosed. The conductive portion of a land pad that overlaps a parallel ground plane within the substrate is reduced by one or more non-conductive voids though the thickness of the conductive portion of the land pad. The voids may allow the contact area of the land pad, as defined by the perimeter of the land pad, to remain the same while reducing the conductive portion that overlaps the parallel ground plane. Capacitance between the land pad and the parallel ground plane is reduced by an amount proportional to the reduction in overlapping conductive area.

公开(公告)号：US10804650B2

公开(公告)日：2020-10-13

申请号：US16468271

申请日：2016-12-31

Applicant: Intel Corporation

Inventor： Jeffrey Lee ,  Brent R. Rothermel ,  Kemal Aygun

IPC: H01R12/00 ,  H01R13/6471 ,  H01R13/6587 ,  H01R43/20

Abstract: Electrical connector technology is disclosed. In one example, a connector for coupling an electronics sub-assembly to an electronics assembly comprises a connector body having and a sub-assembly interface configured to electrically couple to an electronics sub-assembly. The connector has a circuit board interface configured to electrically couple to a circuit board of an electronics assembly. The connector has at least two rows of contacts configured to electrically couple the circuit board to the electronics sub-assembly. The at least two rows of contacts are aligned offset relative to each other such that any ground contact of one row avoids intersection of a plane in which any ground contact of the other row resides to at least partially cancel row-to-row crosstalk when the at least two rows of contacts are transmitting signals at a predetermined high-speed bit rate.

公开(公告)号：US10433421B2

公开(公告)日：2019-10-01

申请号：US13727439

申请日：2012-12-26

Applicant: INTEL CORPORATION

Inventor： Zhichao Zhang ,  Tao Wu ,  Gaurav Chawla ,  Jeffrey Lee

IPC: H05K1/11 ,  H05K1/02 ,  H05K3/34

Abstract: A land grid array (LGA) land pad having reduced capacitance is disclosed. The conductive portion of a land pad that overlaps a parallel ground plane within the substrate is reduced by one or more non-conductive voids though the thickness of the conductive portion of the land pad. The voids may allow the contact area of the land pad, as defined by the perimeter of the land pad, to remain the same while reducing the conductive portion that overlaps the parallel ground plane. Capacitance between the land pad and the parallel ground plane is reduced by an amount proportional to the reduction in overlapping conductive area.