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公开(公告)号：US20250061317A1
公开(公告)日：2025-02-20
申请号：US18935223
申请日：2024-11-01
Applicant: INTEL CORPORATION
Inventor： Juan Pablo Munoz Chiabrando , Jinjie Yuan , Nilesh Kumar Jain
IPC: G06N3/0495
Abstract: An example apparatus includes interface circuitry, machine-readable instructions, and at least one processor circuit to be programmed by the machine-readable instructions to sparsify a base model of a foundation model to generate a sparse base model, apply a neural low-rank adapter search to the sparse base model, and output a fine-tuned base model based on application of the neural low-rank adapter search to the sparse base model.
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