公开(公告)号：US09728425B1

公开(公告)日：2017-08-08

申请号：US15089491

申请日：2016-04-02

Applicant: INTEL CORPORATION

Inventor： Joshua D. Heppner ,  Serge Roux ,  Michael J. Baker ,  Javier A. Falcon

IPC: H01L21/56 ,  H01L21/67 ,  B29C35/08 ,  B29C70/84 ,  B29C70/80 ,  B29C70/88 ,  H01L23/31 ,  B29K63/00 ,  B29L31/34

CPC classification number: H01L21/563 ,  B29K2063/00 ,  B29K2995/0005 ,  B29L2031/3481 ,  H01L21/67126 ,  H01L23/3157 ,  H01L2224/16225 ,  H01L2224/73204 ,  H01L2224/743 ,  H01L2224/92125

Abstract: Space-efficient underfilling techniques for electronic assemblies are described. According to some such techniques, an underfilling method may comprise mounting an electronic element on a surface of a substrate, dispensing an underfill material upon the surface of the substrate within a dispense region for forming an underfill for the electronic element, and projecting curing rays upon at least a portion of the dispensed underfill material to inhibit an outward flow of dispensed underfill material from the dispense region, and the underfill material may comprise a non-visible light (NVL)-curable material. Other embodiments are described and claimed.