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    MULTIPROCESSOR SYSTEM WITH DETERMINATION OF THE PROCESSOR OBTAINING THE SMALLEST RESULT
    3.
    发明专利
    MULTIPROCESSOR SYSTEM WITH DETERMINATION OF THE PROCESSOR OBTAINING THE SMALLEST RESULT 未知

    公开(公告)号：DE3164209D1

    公开(公告)日：1984-07-19

    申请号：DE3164209

    申请日：1981-10-14

    Applicant: INVENTIO AG

    Inventor： FRIEDLI PAUL DR ,  HINDERLING THOMAS DR

    IPC: G06F15/16 ,  B66B1/18 ,  G06F13/26 ,  G06F15/177 ,  G06F3/04

    Abstract: The multiprocessor system enables rapid comparison of results determined from input data at the individual microprocessors. During a first phase of the comparison the results which are to be compared are transferred from the individual microprocessors to counters in connection logic components each of which is associated with an individual microprocessor. During a second comparison phase which is started by activating a comparison line to which all the connection logic components are connected via a bus driver, the counters are simultaneously started to count for periods of time each of which corresponds to the result which has been transferred to the respective counter. The comparison line is deactivated by the counter with which the longest counting period is associated. For the purpose of determining the deactivated state, the comparison line is connected to respective inputs of the connection logic components. An interrupt request is produced at that one of the microprocessors which is associated with the counter having the longest counting period. The multiprocessor system can be used, for example, to control the optimum operation of an elevator system.

    PATTERN GENERATOR FOR A DRIVE CONTROL DEVICE
    5.
    发明专利
    PATTERN GENERATOR FOR A DRIVE CONTROL DEVICE 未知

    公开(公告)号：DE3364997D1

    公开(公告)日：1986-09-04

    申请号：DE3364997

    申请日：1983-10-19

    Applicant: INVENTIO AG

    Inventor： FRIEDLI PAUL DR ,  HINDERLING THOMAS DR ,  BEGLE GUNTRAM

    IPC: B66B1/16 ,  B66B1/24 ,  G05B19/23 ,  H02P5/40

    Abstract: With this set or reference value transmitter which is controlled by a set or reference value clock pulse generator or transmitter regulation of the running-up or acceleration of electric motors, such as asynchronous motors, can be kept under control also in the upper rotational speed ranges of the motor by adapting the displacement path-reference value characteristic curve to the displacement path-actual value characteristic curve. For this purpose the reference value transmitter comprises a correction member, by means of which the displacement path-regulation deviation is supervised in such a way that if the greatest displacement path-regulation deviation associated with the maximum power of the adjusting or positioning members is exceeded, the clock pulse frequency of the reference value clock pulse transmitter is reduced proportionally to the excess. The displacement path-reference values are supplied to the displacement path regulation circuit in correspondingly larger time intervals until the greatest displacement path-regulation deviation is fallen short of, whereupon the reference value transmitter continues to operate with the original clock pulse frequency.

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