公开(公告)号：US12046509B2

公开(公告)日：2024-07-23

申请号：US17128866

申请日：2020-12-21

Applicant: Infineon Technologies AG

Inventor： Stephan Voss ,  Alexander Breymesser ,  Eva-Maria Hof ,  Mathias Plappert ,  Carsten Schaeffer

IPC: H01L21/768 ,  H01L23/00 ,  H01L23/52

CPC classification number: H01L21/76838 ,  H01L23/52 ,  H01L23/564

Abstract: A semiconductor device and a method of manufacturing a semiconductor are provided. In an embodiment, a metallic layer may be formed over a semiconductor substrate. An anti-reflective layer may be formed over the metallic layer. A passivation layer may be formed over the anti-reflective layer. An opening may be formed in the passivation layer to expose the anti-reflective layer.

公开(公告)号：US10038052B2

公开(公告)日：2018-07-31

申请号：US15085618

申请日：2016-03-30

Applicant: Infineon Technologies AG

Inventor： Elmar Falck ,  Frank Dieter Pfirsch ,  Hans-Joachim Schulze ,  Stephan Voss

IPC: H01L21/761 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/0623 ,  H01L21/761 ,  H01L29/0619 ,  H01L29/0638 ,  H01L29/0878 ,  H01L29/1095 ,  H01L29/407 ,  H01L29/7395 ,  H01L29/7811 ,  H01L29/7813

Abstract: A vertical semiconductor device comprises a substrate having a front surface and a back surface, an active area (AA) located in the substrate, having a drift region doped with a first dopant type, an edge termination region (ER) laterally surrounding the active area (AA), a channelstopper terminal provided at the front surface and located in the edge termination region (ER), and a first suppression trench located on a side of the channelstopper terminal towards the active region (AA), and provided adjacent to the channelstopper terminal. Further, a production method for such a semiconductor device is provided.

公开(公告)号：US09917181B2

公开(公告)日：2018-03-13

申请号：US15296594

申请日：2016-10-18

Applicant: Infineon Technologies AG

Inventor： Frank Dieter Pfirsch ,  Franz-Josef Niedernostheide ,  Hans-Joachim Schulze ,  Stephan Voss

IPC: H01L29/00 ,  H01L29/739 ,  H01L29/15 ,  H01L29/08

CPC classification number: H01L29/7395 ,  H01L29/0623 ,  H01L29/0634 ,  H01L29/083 ,  H01L29/0834 ,  H01L29/157 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/7397 ,  H01L29/8611

Abstract: A superjunction bipolar transistor includes an active transistor cell area that includes active transistor cells electrically connected to a first load electrode at a front side of a semiconductor body. A superjunction area overlaps the active transistor cell area and includes a low-resistive region and a reservoir region outside of the low-resistive region. The low-resistive region includes a first superjunction structure with a first vertical extension with respect to a first surface of the semiconductor body. The reservoir region includes no superjunction structure or a second superjunction structure with a mean second vertical extension smaller than the first vertical extension.

公开(公告)号：US09224806B2

公开(公告)日：2015-12-29

申请号：US13961155

申请日：2013-08-07

Applicant: Infineon Technologies AG

Inventor： Stephan Voss ,  Alexander Breymesser ,  Hans-Joachim Schulze ,  Erich Griebl ,  Oliver Haeberlen ,  Andreas Moser

IPC: H01L29/06 ,  H01L21/761

CPC classification number: H01L29/063 ,  H01L21/761 ,  H01L29/0615 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/66348 ,  H01L29/66712 ,  H01L29/66734 ,  H01L29/7395 ,  H01L29/7397 ,  H01L29/7811 ,  H01L29/7813

Abstract: A semiconductor device includes a semiconductor body and an edge termination structure. The edge termination structure comprises a first oxide layer, a second oxide layer, a semiconductor mesa region between the first oxide layer and the second oxide layer, and a doped field region comprising a first section in the semiconductor mesa region, and a second section in a region below the semiconductor mesa region. The second section overlaps the first and the second oxide layers in the region below the semiconductor mesa region.

Abstract translation: 半导体器件包括半导体本体和边缘端接结构。 边缘终端结构包括第一氧化物层，第二氧化物层，第一氧化物层和第二氧化物层之间的半导体台面区域，以及包括半导体台面区域中的第一部分的掺杂场区域，以及第二部分 半导体台面区域以下的区域。 第二部分与半导体台面区域下方的区域中的第一和第二氧化物层重叠。

公开(公告)号：US20150270347A1

公开(公告)日：2015-09-24

申请号：US14730663

申请日：2015-06-04

Applicant: Infineon Technologies AG

Inventor： Stephan Voss ,  Franz-Josef Niedernostheide ,  Hans-Joachim Schulze

IPC: H01L29/15 ,  H01L29/165 ,  H01L29/739 ,  H01L29/10 ,  H01L29/861 ,  H01L29/74 ,  H01L29/167 ,  H01L29/08

CPC classification number: H01L29/157 ,  H01L29/08 ,  H01L29/10 ,  H01L29/1095 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/36 ,  H01L29/7393 ,  H01L29/7395 ,  H01L29/74 ,  H01L29/861

Abstract: A semiconductor device includes a first semiconductor region including a first semiconductor material and a second semiconductor region adjoining the first semiconductor region, the second semiconductor region including a second semiconductor material different from the first semiconductor material. The semiconductor device further includes at least one of a drift zone and a base zone in the first semiconductor region, and at least one type of deep-level dopant in an emitter region of the second semiconductor region. The at least one type of deep-level dopant has a distance to the valence or conduction band of at least 100 meV.

Abstract translation: 半导体器件包括包括第一半导体材料的第一半导体区域和与第一半导体区域邻接的第二半导体区域，第二半导体区域包括不同于第一半导体材料的第二半导体材料。 半导体器件还包括第一半导体区域中的漂移区域和基极区域中的至少一个以及第二半导体区域的发射极区域中的至少一种类型的深度级掺杂剂。 至少一种类型的深层掺杂剂具有至少100meV的价带或导带的距离。

公开(公告)号：US20220037165A1

公开(公告)日：2022-02-03

申请号：US17386699

申请日：2021-07-28

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Alexander Breymesser ,  Bernhard Goller ,  Matthias Kuenle ,  Helmut Oefner ,  Francisco Javier Santos Rodriguez ,  Stephan Voss

IPC: H01L21/324 ,  H01L21/265 ,  H01L21/78

Abstract: A method of forming a semiconductor device, including forming a first semiconductor layer on a semiconductor substrate, the first semiconductor layer being of the same dopant type as the semiconductor substrate, the first semiconductor layer having a higher dopant concentration than the semiconductor substrate, increasing the porosity of the first semiconductor layer, first annealing the first semiconductor layer at a temperature of at least 1050° C., forming a second semiconductor layer on the first semiconductor layer and separating the second semiconductor layer from the semiconductor substrate by splitting within the first semiconductor layer.

公开(公告)号：US20190165090A1

公开(公告)日：2019-05-30

申请号：US16202752

申请日：2018-11-28

Applicant: Infineon Technologies AG

Inventor： Hans-Joachim Schulze ,  Franz-Josef Niedernostheide ,  Oana Julia Spulber ,  Stephan Voss

IPC: H01L29/06 ,  H01L21/265 ,  H01L21/324 ,  H01L29/10 ,  H01L29/66

Abstract: A method of manufacturing a device in a semiconductor body includes forming a first field stop zone portion of a first conductivity type and a drift zone of the first conductivity type on the first field stop zone portion. An average doping concentration of the drift zone is smaller than 80% of that of the first field stop zone portion. The semiconductor body is processed at a first surface and thinned by removing material from a second surface. A second field stop zone portion of the first conductivity type is formed by implanting protons at one or more energies through the second surface. A deepest end-of-range peak of the protons is set in the first field stop zone portion at a vertical distance to a transition between the drift zone and first field stop zone portion in a range from 3 μm to 60 μm. The semiconductor body is annealed.

公开(公告)号：US10177230B2

公开(公告)日：2019-01-08

申请号：US14730663

申请日：2015-06-04

Applicant: Infineon Technologies AG

Inventor： Stephan Voss ,  Franz-Josef Niedernostheide ,  Hans-Joachim Schulze

IPC: H01L29/36 ,  H01L29/10 ,  H01L29/15 ,  H01L29/861 ,  H01L29/08 ,  H01L29/739 ,  H01L29/161 ,  H01L29/165 ,  H01L29/167 ,  H01L29/74

Abstract: A semiconductor device includes a first semiconductor region including a first semiconductor material and a second semiconductor region adjoining the first semiconductor region, the second semiconductor region including a second semiconductor material different from the first semiconductor material. The semiconductor device further includes at least one of a drift zone and a base zone in the first semiconductor region, and at least one type of deep-level dopant in an emitter region of the second semiconductor region. The at least one type of deep-level dopant has a distance to the valence or conduction band of at least 100 meV.

公开(公告)号：US20180090565A1

公开(公告)日：2018-03-29

申请号：US15708209

申请日：2017-09-19

Applicant: Infineon Technologies AG

Inventor： Stephan Voss ,  Alexander Breymesser ,  Hans-Joachim Schulze ,  Yvonne Gawlina-Schmidl

IPC: H01L29/06 ,  H01L29/10 ,  H01L21/265 ,  H01L21/324 ,  H01L21/225

CPC classification number: H01L29/0638 ,  H01L21/225 ,  H01L21/265 ,  H01L21/324 ,  H01L29/0611 ,  H01L29/0619 ,  H01L29/1095 ,  H01L29/36 ,  H01L29/66333 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/8611

Abstract: A semiconductor device includes a common doping region located within a semiconductor substrate of the semiconductor device. The common doping region includes a first portion. A maximal doping concentration within the first portion is higher than 1·1015 cm−3. The common doping region includes a second portion. A minimal doping concentration within the second portion is lower than 50% of the maximal doping concentration within the first portion of the common doping region. The common doping region includes a third portion. A minimal doping concentration within the third portion is more than 30% higher than the minimal doping concentration within the second portion. The second portion of the common doping region is located vertically between the first portion of the common doping region and the third portion of the common doping region.

公开(公告)号：US09754787B2

公开(公告)日：2017-09-05

申请号：US14313366

申请日：2014-06-24

Applicant: Infineon Technologies AG

Inventor： Johannes Laven ,  Hans-Joachim Schulze ,  Stephan Voss ,  Alexander Breymesser ,  Alexander Susiti ,  Shuhai Liu ,  Helmut Oefner

IPC: H01L21/425 ,  H01L21/263 ,  H01L21/265 ,  H01L21/324 ,  H01L29/36 ,  H01L29/66 ,  H01L29/861 ,  H01L29/872 ,  H01L29/739 ,  H01L29/16 ,  H01L29/22

CPC classification number: H01L21/263 ,  H01L21/26506 ,  H01L21/3242 ,  H01L29/1608 ,  H01L29/2203 ,  H01L29/36 ,  H01L29/66136 ,  H01L29/66143 ,  H01L29/66712 ,  H01L29/7395 ,  H01L29/7802 ,  H01L29/8611 ,  H01L29/872

Abstract: A Magnetic Czochralski semiconductor wafer having opposing first and second sides arranged distant from one another in a first vertical direction is treated by implanting first particles into the semiconductor wafer via the second side to form crystal defects in the semiconductor wafer. The crystal defects have a maximum defect concentration at a first depth. The semiconductor wafer is heated in a first thermal process to form radiation induced donors. Implantation energy and dose are chosen such that the semiconductor wafer has, after the first thermal process, an n-doped semiconductor region arranged between the second side and first depth, and the n-doped semiconductor region has, in the first vertical direction, a local maximum of a net doping concentration between the first depth and second side and a local minimum of the net doping concentration between the first depth and first maximum.