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1.发明公开A METHOD FOR GROWING III-V MATERIALS ON A NON III-V MATERIAL SUBSTRATE COMPRISING STEPS IMPROVING DISLOCATION FAULT DENSITY OF A FINISHED MATERIAL STRUCTURE SUITABLE FOR USE IN SEMICONDUCTOR MANUFACTURING AND SEMICONDUCTOR APPLICATIONS 审中-公开METHOD FOR GROWING III-V族材料ON A SUBSTRATE从非III-V材料结合步骤提高制造材料结构DISLOKATIONSFEHLERDICHTE FOR USE IN半导体制造和半导体应用
公开(公告)号：EP2748838A1
公开(公告)日：2014-07-02
申请号：EP12748503.5
申请日：2012-08-22
Applicant: Integrated Optoelectronics AS
Inventor： BUGGE, Renato , MYRVÅGNES, Geir , NILSEN, Tron Arne
CPC classification number: H01L21/02549 , C30B23/025 , C30B23/066 , C30B29/42 , H01L21/02381 , H01L21/02463 , H01L21/02466 , H01L21/02502 , H01L21/02521 , H01L21/02546 , H01L21/02617 , H01L21/02631 , H01L21/02661 , H01L29/205
Abstract: The present invention relates to a method for manufacturing semiconductor materials comprising epitaxial growing of group III-V materials, for example gallium arsenide (GaAs), on for example a non III-V group material like silicon (Si) substrates (wafers), and especially to pre-processing steps providing a location stabilization of dislocation faults in a surface layer of the non III-V material wafer in an orientation relative to an epitaxial material growing direction during growing of the III-V materials, wherein the location stabilized dislocation fault orientations provides a barrier against threading dislocations (stacking of faults) from being formed in the growing direction of the III-V materials during the epitaxial growth process.
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公开(公告)号：EP2748838B1
公开(公告)日：2019-06-12
申请号：EP12748503.5
申请日：2012-08-22
Applicant: Integrated Optoelectronics AS
Inventor： BUGGE, Renato , MYRVÅGNES, Geir , NILSEN, Tron Arne
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