公开(公告)号：US12282778B2

公开(公告)日：2025-04-22

申请号：US18479974

申请日：2023-10-03

Applicant: Intel Corporation

Inventor： Jared W. Stark ,  Ahmad Yasin ,  Ajay Amarsingh Singh

IPC: G06F9/38 ,  G06F9/30 ,  G06F12/0804

Abstract: Embodiments of apparatuses, methods, and systems for selective use of branch prediction hints are described. In an embodiment, an apparatus includes an instruction decoder and a branch predictor. The instruction decoder is to decode a branch instruction having a hint. The branch predictor is to provide a prediction and a hint-override indicator. The hint-override indicator is to indicate whether the prediction is based on stored information about the branch instruction. The prediction is to override the hint if the hint-override indicator indicates that the prediction is based on stored information about the branch instruction.

公开(公告)号：US11809873B2

公开(公告)日：2023-11-07

申请号：US17033749

申请日：2020-09-26

Applicant: Intel Corporation

Inventor： Jared W. Stark ,  Ahmad Yasin ,  Ajay Amarsingh Singh

IPC: G06F9/38 ,  G06F9/30 ,  G06F12/0804

CPC classification number: G06F9/3842 ,  G06F9/30145 ,  G06F9/3867 ,  G06F12/0804

Abstract: Embodiments of apparatuses, methods, and systems for selective use of branch prediction hints are described. In an embodiment, an apparatus includes an instruction decoder and a branch predictor. The instruction decoder is to decode a branch instruction having a hint. The branch predictor is to provide a prediction and a hint-override indicator. The hint-override indicator is to indicate whether the prediction is based on stored information about the branch instruction. The prediction is to override the hint if the hint-override indicator indicates that the prediction is based on stored information about the branch instruction.

公开(公告)号：US20240118898A1

公开(公告)日：2024-04-11

申请号：US18479974

申请日：2023-10-03

Applicant: Intel Corporation

Inventor： Jared W. Stark ,  Ahmad Yasin ,  Ajay Amarsingh Singh

IPC: G06F9/38 ,  G06F9/30 ,  G06F12/0804

CPC classification number: G06F9/3842 ,  G06F9/30145 ,  G06F9/3867 ,  G06F12/0804

Abstract: Embodiments of apparatuses, methods, and systems for selective use of branch prediction hints are described. In an embodiment, an apparatus includes an instruction decoder and a branch predictor. The instruction decoder is to decode a branch instruction having a hint. The branch predictor is to provide a prediction and a hint-override indicator. The hint-override indicator is to indicate whether the prediction is based on stored information about the branch instruction. The prediction is to override the hint if the hint-override indicator indicates that the prediction is based on stored information about the branch instruction.

公开(公告)号：US20210342157A1

公开(公告)日：2021-11-04

申请号：US17033749

申请日：2020-09-26

Applicant: Intel Corporation

Inventor： Jared W. Stark ,  Ahmad Yasin ,  Ajay Amarsingh Singh

IPC: G06F9/38 ,  G06F9/30 ,  G06F12/0804

Abstract: Embodiments of apparatuses, methods, and systems for selective use of branch prediction hints are described. In an embodiment, an apparatus includes an instruction decoder and a branch predictor. The instruction decoder is to decode a branch instruction having a hint. The branch predictor is to provide a prediction and a hint-override indicator. The hint-override indicator is to indicate whether the prediction is based on stored information about the branch instruction. The prediction is to override the hint if the hint-override indicator indicates that the prediction is based on stored information about the branch instruction.