公开(公告)号：US20190012762A1

公开(公告)日：2019-01-10

申请号：US16039509

申请日：2018-07-19

Applicant: Intel Corporation

Inventor： Altug Koker ,  Lakshminarayanan Striramassarma ,  Akif Ali

IPC: G06T1/20 ,  G06T15/00 ,  G06T15/80 ,  G06F15/08 ,  G06T11/00 ,  G06T1/60 ,  H04L12/933

CPC classification number: G06T1/20 ,  G06F15/08 ,  G06T1/60 ,  G06T11/001 ,  G06T15/005 ,  G06T15/80 ,  H04L49/109

Abstract: In on embodiment, a hybrid fabric interconnects multiple graphics processor cores within a processor. The hybrid fabric interconnect includes multiple data channels, including programmable virtual data channels. The virtual data channels carry multiple traffic classes of packet-based messages. The virtual data channels and multiple traffic classes may be assigned one of multiple priorities. The virtual data channels may be arbitrated independently. The hybrid fabric is scalable and can support multiple topologies, including multiple stacked integrated circuit topologies.

公开(公告)号：US10102604B2

公开(公告)日：2018-10-16

申请号：US15083689

申请日：2016-03-29

Applicant: Intel Corporation

Inventor： Altug Koker ,  Lakshminarayanan Striramassarma ,  Akif Ali

IPC: G06F15/16 ,  G06T1/20 ,  G06T1/60 ,  G06F15/08 ,  G06T11/00 ,  G06T15/00 ,  G06T15/80 ,  H04L12/933

Abstract: In on embodiment, a hybrid fabric interconnects multiple graphics processor cores within a processor. The hybrid fabric interconnect includes multiple data channels, including programmable virtual data channels. The virtual data channels carry multiple traffic classes of packet-based messages. The virtual data channels and multiple traffic classes may be assigned one of multiple priorities. The virtual data channels may be arbitrated independently. The hybrid fabric is scalable and can support multiple topologies, including multiple stacked integrated circuit topologies.

公开(公告)号：US20160284046A1

公开(公告)日：2016-09-29

申请号：US15083689

申请日：2016-03-29

Applicant: Intel Corporation

Inventor： Altug Koker ,  Lakshminarayanan Striramassarma ,  Akif Ali

IPC: G06T1/20 ,  G06T15/80 ,  G06T11/00 ,  G06T1/60 ,  G06T15/00

CPC classification number: G06T1/20 ,  G06F15/08 ,  G06T1/60 ,  G06T11/001 ,  G06T15/005 ,  G06T15/80 ,  H04L49/109

Abstract: In on embodiment, a hybrid fabric interconnects multiple graphics processor cores within a processor. The hybrid fabric interconnect includes multiple data channels, including programmable virtual data channels. The virtual data channels carry multiple traffic classes of packet-based messages. The virtual data channels and multiple traffic classes may be assigned one of multiple priorities. The virtual data channels may be arbitrated independently. The hybrid fabric is scalable and can support multiple topologies, including multiple stacked integrated circuit topologies.

Abstract translation: 在实施例中，混合架构互连处理器内的多个图形处理器核心。 混合网络互连包括多个数据信道，包括可编程虚拟数据信道。 虚拟数据信道承载多个基于分组的消息的业务类别。 可以将虚拟数据信道和多个业务类别分配为多个优先级之一。 虚拟数据通道可以独立地进行仲裁。 混合架构是可扩展的，可以支持多种拓扑结构，包括多个堆叠集成电路拓扑。

公开(公告)号：US10580109B2

公开(公告)日：2020-03-03

申请号：US16417899

申请日：2019-05-21

Applicant: Intel Corporation

Inventor： Altug Koker ,  Lakshminarayanan Striramassarma ,  Akif Ali

IPC: G06T1/20 ,  G06T1/60 ,  G06F15/08 ,  G06T11/00 ,  G06T15/00 ,  G06T15/80 ,  H04L12/933

Abstract: One embodiment provides for a processor comprising a three-dimensional (3D) integrated circuit stack including multiple graphics processor cores and interconnect logic to interconnect the graphics processor cores of the 3D integrated circuit stack to enable data distribution between the graphics processor cores over a virtual channel including multiple programmatically pre-assigned traffic classifications.

公开(公告)号：US20190272615A1

公开(公告)日：2019-09-05

申请号：US16417899

申请日：2019-05-21

Applicant: Intel Corporation

Inventor： Altug Koker ,  Lakshminarayanan Striramassarma ,  Akif Ali

IPC: G06T1/20 ,  G06T15/00 ,  G06T15/80 ,  G06T1/60 ,  G06T11/00 ,  G06F15/08

Abstract: One embodiment provides for a processor comprising a three-dimensional (3D) integrated circuit stack including multiple graphics processor cores and interconnect logic to interconnect the graphics processor cores of the 3D integrated circuit stack to enable data distribution between the graphics processor cores over a virtual channel including multiple programmatically pre-assigned traffic classifications.

公开(公告)号：US10346946B2

公开(公告)日：2019-07-09

申请号：US16039509

申请日：2018-07-19

Applicant: Intel Corporation

Inventor： Altug Koker ,  Lakshminarayanan Striramassarma ,  Akif Ali

IPC: G06T11/00 ,  G06T15/00 ,  G06T1/20 ,  G06T1/60 ,  G06F15/08 ,  G06T15/80 ,  H04L12/933

Abstract: In on embodiment, a hybrid fabric interconnects multiple graphics processor cores within a processor. The hybrid fabric interconnect includes multiple data channels, including programmable virtual data channels. The virtual data channels carry multiple traffic classes of packet-based messages. The virtual data channels and multiple traffic classes may be assigned one of multiple priorities. The virtual data channels may be arbitrated independently. The hybrid fabric is scalable and can support multiple topologies, including multiple stacked integrated circuit topologies.