公开(公告)号：US20170287098A1

公开(公告)日：2017-10-05

申请号：US15084803

申请日：2016-03-30

Applicant: Intel Corporation

Inventor： Filip Strugar ,  Axel Mamode

IPC: G06T1/20 ,  G06T1/60 ,  G06T15/40 ,  G06T15/00 ,  G06T15/80

CPC classification number: G06T1/20 ,  G06F12/0804 ,  G06F2212/1041 ,  G06T1/60 ,  G06T15/005 ,  G06T15/40 ,  G06T15/80

Abstract: Embodiment described herein combines a caching system with special cache flushing methods aimed at reducing thread divergence across a group of threads in a thread group, in order to synchronize branching paths taken by different threads executing on the same graphics processor execution unit, One embodiment provides for a graphics processing apparatus comprising graphics execution logic to execute one or more threads of a graphics shader program; an occluder cache to store input occluder node data for adaptive graphical effects logic of the graphics shader program; and compression logic to compress input occluder node data stored in the occluder cache. The occluder node data, in one embodiment, includes occlusion data for use with adaptive shadowing or transparency logic.

公开(公告)号：US09959590B2

公开(公告)日：2018-05-01

申请号：US15084803

申请日：2016-03-30

Applicant: Intel Corporation

Inventor： Filip Strugar ,  Axel Mamode

IPC: G06T1/20 ,  G06T15/00 ,  G06T15/80 ,  G06T15/40 ,  G06T1/60

CPC classification number: G06T1/20 ,  G06F12/0804 ,  G06F2212/1041 ,  G06T1/60 ,  G06T15/005 ,  G06T15/40 ,  G06T15/80

Abstract: Embodiment described herein combines a caching system with special cache flushing methods aimed at reducing thread divergence across a group of threads in a thread group, in order to synchronize branching paths taken by different threads executing on the same graphics processor execution unit, One embodiment provides for a graphics processing apparatus comprising graphics execution logic to execute one or more threads of a graphics shader program; an occluder cache to store input occluder node data for adaptive graphical effects logic of the graphics shader program; and compression logic to compress input occluder node data stored in the occluder cache. The occluder node data, in one embodiment, includes occlusion data for use with adaptive shadowing or transparency logic.