公开(公告)号：US10332302B2

公开(公告)日：2019-06-25

申请号：US15489090

申请日：2017-04-17

Applicant: Intel Corporation

Inventor： Balaji Vembu ,  Murali Ramadoss ,  David I. Standring ,  Shruti A. Sethi ,  Jeffrey S. Frizzell ,  Alan M. Curtis ,  Abhishek R. Appu ,  Joydeep Ray ,  Altug Koker

IPC: G06F12/02 ,  G06T15/00

Abstract: In an example, an apparatus comprises a plurality of execution units, and logic, at least partially including hardware logic, to create a scatter gather list in memory and collect a plurality of operating statistics for the plurality of execution units using the scatter gather list. Other embodiments are also disclosed and claimed.

公开(公告)号：US10922869B2

公开(公告)日：2021-02-16

申请号：US16832933

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Balaji Vembu ,  Murali Ramadoss ,  David I. Standring ,  Shruti A. Sethi ,  Jeffrey S. Frizzell ,  Alan M. Curtis ,  Abhishek R. Appu ,  Joydeep Ray ,  Altug Koker

IPC: G06T15/00 ,  G06F12/0813 ,  G06F13/16 ,  G06F12/084 ,  G06F12/10 ,  G06F12/02 ,  G06F12/0811 ,  G06F12/0831

Abstract: In an example, an apparatus comprises a plurality of execution units, and logic, at least partially including hardware logic, to create a scatter gather list in memory and collect a plurality of operating statistics for the plurality of execution units using the scatter gather list. Other embodiments are also disclosed and claimed.

公开(公告)号：US20200286277A1

公开(公告)日：2020-09-10

申请号：US16832933

申请日：2020-03-27

Applicant: Intel Corporation

Inventor： Balaji Vembu ,  Murali Ramadoss ,  David I. Standring ,  Shruti A. Sethi ,  Jeffrey S. Frizzell ,  Alan M. Curtis ,  Abhishek R. Appu ,  Joydeep Ray ,  Altug Koker

IPC: G06T15/00 ,  G06F12/0813 ,  G06F13/16 ,  G06F12/084 ,  G06F12/10 ,  G06F12/02

Abstract: In an example, an apparatus comprises a plurality of execution units, and logic, at least partially including hardware logic, to create a scatter gather list in memory and collect a plurality of operating statistics for the plurality of execution units using the scatter gather list. Other embodiments are also disclosed and claimed.

公开(公告)号：US20180300931A1

公开(公告)日：2018-10-18

申请号：US15489090

申请日：2017-04-17

Applicant: Intel Corporation

Inventor： Balaji Vembu ,  Murali Ramadoss ,  David I. Standring ,  Shruti A. Sethi ,  Jeffrey S. Frizzell ,  Alan M. Curtis ,  Abhishek R. Appu ,  Joydeep Ray ,  Altug Koker

IPC: G06T15/00 ,  G06F12/02

CPC classification number: G06T15/005 ,  G06F12/0811 ,  G06F12/0813 ,  G06F12/0831 ,  G06F12/084 ,  G06F12/10 ,  G06F13/16 ,  G06F2212/1024 ,  G06F2212/1044 ,  G06F2212/455 ,  G06F2212/656

Abstract: In an example, an apparatus comprises a plurality of execution units, and logic, at least partially including hardware logic, to create a scatter gather list in memory and collect a plurality of operating statistics for the plurality of execution units using the scatter gather list. Other embodiments are also disclosed and claimed.

公开(公告)号：US11494967B2

公开(公告)日：2022-11-08

申请号：US17173892

申请日：2021-02-11

Applicant: Intel Corporation

Inventor： Balaji Vembu ,  Murali Ramadoss ,  David I. Standring ,  Shruti A. Sethi ,  Jeffrey S. Frizzell ,  Alan M. Curtis ,  Abhishek R. Appu ,  Joydeep Ray ,  Altug Koker

IPC: G06T15/00 ,  G06F12/084 ,  G06F12/10 ,  G06F12/02 ,  G06F12/0811 ,  G06F12/0813 ,  G06F13/16 ,  G06F12/0831

Abstract: In an example, an apparatus comprises a plurality of execution units, and logic, at least partially including hardware logic, to create a scatter gather list in memory and collect a plurality of operating statistics for the plurality of execution units using the scatter gather list. Other embodiments are also disclosed and claimed.

公开(公告)号：US20210312692A1

公开(公告)日：2021-10-07

申请号：US17173892

申请日：2021-02-11

Applicant: Intel Corporation

Inventor： Balaji Vembu ,  Murali Ramadoss ,  David I. Standring ,  Shruti A. Sethi ,  Jeffrey S. Frizzell ,  Alan M. Curtis ,  Abhishek R. Appu ,  Joydeep Ray ,  Altug Koker

IPC: G06T15/00 ,  G06F12/0813 ,  G06F13/16 ,  G06F12/084 ,  G06F12/10 ,  G06F12/02

Abstract: In an example, an apparatus comprises a plurality of execution units, and logic, at least partially including hardware logic, to create a scatter gather list in memory and collect a plurality of operating statistics for the plurality of execution units using the scatter gather list. Other embodiments are also disclosed and claimed.

公开(公告)号：US10607392B2

公开(公告)日：2020-03-31

申请号：US16405353

申请日：2019-05-07

Applicant: Intel Corporation

Inventor： Balaji Vembu ,  Murali Ramadoss ,  David I. Standring ,  Shruti A. Sethi ,  Jeffrey S. Frizzell ,  Alan M. Curtis ,  Abhishek R. Appu ,  Joydeep Ray ,  Altug Koker

IPC: G06T15/00 ,  G06F12/02 ,  G06F12/084 ,  G06F12/0813 ,  G06F12/10 ,  G06F13/16 ,  G06F12/0831 ,  G06F12/0811

Abstract: In an example, an apparatus comprises a plurality of execution units, and logic, at least partially including hardware logic, to create a scatter gather list in memory and collect a plurality of operating statistics for the plurality of execution units using the scatter gather list. Other embodiments are also disclosed and claimed.